On Fri, 2017-09-29 at 11:34 -0700, Vineet Gupta wrote:
> On 09/28/2017 07:33 AM, Eugeniy Paltsev wrote:
> > Add temporary fix to HSDK platform code to setup CPU frequency
> > to 1GHz on early boot.
> > We can remove this fix when smart hsdk pll driver will be
> > introduced, see discussion:
> > htt
Signed-off-by: Vineet Gupta
---
arch/arc/include/asm/arcregs.h | 3 ++-
arch/arc/kernel/setup.c| 17 ++---
2 files changed, 16 insertions(+), 4 deletions(-)
diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
index b71d84873f7d..b1c56d35f2a9 100644
-
ARCv2 ISA_CONFIG and ARC700_BUILD build config registers are not
compatible. cpuinfo_arc had isa info placeholder which was mashup of bits
form both.
Untangle this by defining it off of ARCv2 ISA info and it is fine even
for ARC700 since former is a super set of latter (ARC700 buildonly has 2
bits
On 09/28/2017 07:33 AM, Eugeniy Paltsev wrote:
Add temporary fix to HSDK platform code to setup CPU frequency
to 1GHz on early boot.
We can remove this fix when smart hsdk pll driver will be
introduced, see discussion:
https://www.mail-archive.com/linux-snps-arc@lists.infradead.org/msg02689.html
Add option to set initial output frequency of plls via
"clock-frequency" property in pll's device tree node.
This frequency will be set while pll driver probed.
The usage example is setting CPU clock frequency on boot
See discussion:
https://www.mail-archive.com/linux-snps-arc@lists.infradead.org/
