ARC AXS10x boards support custom IP-block which allows to control
reset signals of selected peripherals. For example DW GMAC, etc...
This block is controlled via memory-mapped register (AKA CREG) which
represents up-to 32 reset lines. This regiter is self-clearing so we
don't need to deassert line
On Mon, 2017-09-11 at 09:33 -0700, Vineet Gupta wrote:
> On 09/11/2017 03:28 AM, Philipp Zabel wrote:
> > Hi Vineet,
> >
> > [added Eugeniy to Cc]
> >
> > On Thu, 2017-08-31 at 11:06 -0700, Vineet Gupta wrote:
> > > There is no plan yet to do a v2 board. And even if we were to do
> > > it
> > > o
