>From: Vineet Gupta [mailto:vineet.gup...@synopsys.com]
>Sent: Monday, August 21, 2017 20:04 PM
>> +
>> +/* Handle an out of bounds mtm hs counter value */ static void __init
>> +handle_mtm_hs_ctr_out_of_bounds_error(uint8_t val) {
>> +pr_err("** The value must be in range [%d,%d] (inclu
On 08/21/2017 09:45 AM, Eugeniy Paltsev wrote:
HSDKv1 board
HSDK board
manages its clocks using various PLLs. These PLL have same
dividers and corresponding control registers mapped to different addresses.
So we add one common driver for such PLLs.
Each PLL on HSDK board consists of three
On 06/15/2017 01:43 AM, Noam Camus wrote:
From: Noam Camus
We add ability for all cores at NPS SoC to control the number of cycles
HW thread can execute before it is replace with another eligible
HW thread within the same core. The replacement is done by the
HW scheduler.
Signed-off-by: Noam C
Hi Linus,
Apologies for this very late pull request for ARC changes (was away from my
computer enjoying Indian monsoon).
Please pull.
Thx,
-Vineet
>
The following changes since commit 5771a8c08880cdca3bfb4a3fc6d309d6bba20877:
Linux v4.13-rc1 (2017-07-15 15:22:10 -07
HSDKv1 board manages its clocks using various PLLs. These PLL have same
dividers and corresponding control registers mapped to different addresses.
So we add one common driver for such PLLs.
Each PLL on HSDK board consists of three dividers: IDIV, FBDIV and
ODIV. Output clock value is managed usin
For now baud field of earlycon structure device is't initialised at all
in of_setup_earlycon (in oppositŠµ to register_earlycon).
So when I use stdout-path to point earlycon device
(like stdout-path = &serial or stdout-path = "serial:115200n8")
baud field of earlycon device structure remains uninit
