Re: [PATCH 1/1] futex: remove duplicated code

On Thu, 25 May 2017, Will Deacon wrote: > On Mon, May 22, 2017 at 11:11:33PM +0200, Thomas Gleixner wrote: > > On Mon, 15 May 2017, Will Deacon wrote: > > > On Mon, May 15, 2017 at 03:07:42PM +0200, Jiri Slaby wrote: > > > > There is code duplicated over all architecture's headers for > > > > futex

[PATCH] arc: Remove sometimes misleading toolchain check

Thinking of a toolchains for ARCompact and ARCv2 ISAs we implicitly think about libgcc.a build for one of those ISAs which we're linking with. And given there's no multiarch uClibc toolchain for ARC (as probably for any other architecture) the assumption is the only way to get libgcc.a for desired

Re: [PATCH 1/1] futex: remove duplicated code

On Mon, May 22, 2017 at 11:11:33PM +0200, Thomas Gleixner wrote: > On Mon, 15 May 2017, Will Deacon wrote: > > On Mon, May 15, 2017 at 03:07:42PM +0200, Jiri Slaby wrote: > > > There is code duplicated over all architecture's headers for > > > futex_atomic_op_inuser. Namely op decoding, access_ok c

Re: [PATCH 10/10] ARC: [plat-eznps] Handle memory error as an exception

Hi Noam, On Thu, 2017-05-25 at 12:03 +, Noam Camus wrote: > > > > From: Alexey Brodkin [mailto:alexey.brod...@synopsys.com]  > > Sent: Thursday, May 25, 2017 14:31 PM > ... > > > > > > > > > > > > > Why don't you just make simulator behaving exactly as your real chip? > > > I can't change

RE: [PATCH 10/10] ARC: [plat-eznps] Handle memory error as an exception

>From: Alexey Brodkin [mailto:alexey.brod...@synopsys.com] >Sent: Thursday, May 25, 2017 14:31 PM ... >> > Why don't you just make simulator behaving exactly as your real chip? >> I can't change simulator core behavior. nSIM is a Synopsys proprietary code. >Well probably it worth discussing with

Re: [PATCH 02/10] ARC: send ipi to all cpus sharing task mm in case of page fault

Hi Noam, On Thu, 2017-05-25 at 05:34 +0300, Noam Camus wrote: > From: Noam Camus > > This patch is derived due to performance issue. > The use case is a page fault that resides on more than the local cpu. > Trying to broadcast all CPUs results on performance degradation. > So we try to avoid thi

Re: [PATCH 10/10] ARC: [plat-eznps] Handle memory error as an exception

Hi Noam, On Thu, 2017-05-25 at 11:26 +, Noam Camus wrote: > > > > From: Alexey Brodkin [mailto:alexey.brod...@synopsys.com]  > > Sent: Thursday, May 25, 2017 14:15 PM > > > > > > > > > > > > diff --git a/arch/arc/kernel/entry-compact.S  > > > b/arch/arc/kernel/entry-compact.S index f285db

RE: [PATCH 10/10] ARC: [plat-eznps] Handle memory error as an exception

> From: Alexey Brodkin [mailto:alexey.brod...@synopsys.com] > Sent: Thursday, May 25, 2017 14:15 PM >> >> diff --git a/arch/arc/kernel/entry-compact.S >> b/arch/arc/kernel/entry-compact.S index f285dbb..d152d36 100644 >> --- a/arch/arc/kernel/entry-compact.S >> +++ b/arch/arc/kernel/entry-compa

RE: [PATCH 07/10] ARC: [plat-eznps] disabled stall counter due to a HW bug

>From: Alexey Brodkin [mailto:alexey.brod...@synopsys.com] >Sent: Thursday, May 25, 2017 14:10 PM ... >> diff --git a/arch/arc/plat-eznps/mtm.c b/arch/arc/plat-eznps/mtm.c >> index ffd..e0cb36b 100644 >> --- a/arch/arc/plat-eznps/mtm.c >> +++ b/arch/arc/plat-eznps/mtm.c >> @@ -119,8 +119,6 @@

Re: [PATCH 10/10] ARC: [plat-eznps] Handle memory error as an exception

Hi Noam, On Thu, 2017-05-25 at 05:34 +0300, Noam Camus wrote: > From: Noam Camus > > This commit adds the configuration CONFIG_EZNPS_MEM_ERROR. > If set, it will cause the kernel to handle user memory error > as a machine check exception. > It is required in order to align the NPS simulator memo

RE: [PATCH 06/10] ARC: [plat-eznps] Fix TLB Errata

>From: Alexey Brodkin [mailto:alexey.brod...@synopsys.com] >Sent: Thursday, May 25, 2017 14:01 PM ... >>  /* Get free TLB slot: Set = computed from vaddr, way = random */ >>  sr  TLBGetIndex, [ARC_REG_TLBCOMMAND] >>   >> @@ -287,6 +294,9 @@ ex_saved_reg1: >>  #else >>  sr TLBInsertEnt

Re: [PATCH 07/10] ARC: [plat-eznps] disabled stall counter due to a HW bug

Hi Noam, On Thu, 2017-05-25 at 05:34 +0300, Noam Camus wrote: > From: Noam Camus > > This counter represents threshold for consecutive stall that which > trigger HW threads scheduling. > Low values of this counter cause downgrade in performance > and in the worst case even a livelock. > > Signe

Re: [PATCH 05/10] ARC: [plat-eznps] typo fix at Kconfig

Hi Noam, On Thu, 2017-05-25 at 05:34 +0300, Noam Camus wrote: > From: Noam Camus > > Signed-off-by: Noam Camus > --- >  arch/arc/plat-eznps/Kconfig |4 ++-- >  1 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/arc/plat-eznps/Kconfig b/arch/arc/plat-eznps/Kconfig > index

Re: [PATCH 04/10] ARC: typos fix in kernel/entry-compact.S

Hi Noam, On Thu, 2017-05-25 at 05:34 +0300, Noam Camus wrote: > From: Liav Rehana > > Signed-off-by: Liav Rehana > Signed-off-by: Noam Camus > --- >  arch/arc/kernel/entry-compact.S |   22 +++--- >  1 files changed, 11 insertions(+), 11 deletions(-) Reviewed-by: Alexey Brodkin

Re: [PATCH 03/10] ARC: typo fix in mm/fault.c

Hi Noam, On Thu, 2017-05-25 at 05:34 +0300, Noam Camus wrote: > From: Liav Rehana > > Signed-off-by: Liav Rehana > Signed-off-by: Noam Camus > --- >  arch/arc/mm/fault.c |2 +- >  1 files changed, 1 insertions(+), 1 deletions(-) > > diff --git a/arch/arc/mm/fault.c b/arch/arc/mm/fault.c >

Re: [PATCH 06/10] ARC: [plat-eznps] Fix TLB Errata

Hi Noam, On Thu, 2017-05-25 at 05:34 +0300, Noam Camus wrote: > From: Noam Camus > > Due to a HW bug in NPS400 we get from time to time false TLB miss. > Workaround this by validating each miss. > > Signed-off-by: Noam Camus > --- >  arch/arc/mm/tlbex.S |   10 ++ >  1 files changed, 10

Re: [PATCH 01/10] ARC: set level of log per CPU during boot to be debug level

Hi Noam, On Thu, 2017-05-25 at 05:34 +0300, Noam Camus wrote: > From: Noam Camus > > The reasons are: > 1) speeding up boot time, becomes critical for many CPUs machine, >    e.g. NPS400 with 4K CPUs > 2) shorten kernel log at boot time, again easy to scan for large >    scale machines such NPS4