[PATCH 03/10] ARC: typo fix in mm/fault.c

From: Liav Rehana Signed-off-by: Liav Rehana Signed-off-by: Noam Camus --- arch/arc/mm/fault.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/arc/mm/fault.c b/arch/arc/mm/fault.c index 162c975..a0b7bd6 100644 --- a/arch/arc/mm/fault.c +++ b/arch/arc/mm/fault.c @

[PATCH 07/10] ARC: [plat-eznps] disabled stall counter due to a HW bug

From: Noam Camus This counter represents threshold for consecutive stall that which trigger HW threads scheduling. Low values of this counter cause downgrade in performance and in the worst case even a livelock. Signed-off-by: Noam Camus --- arch/arc/plat-eznps/mtm.c |2 -- 1 files changed

[PATCH 06/10] ARC: [plat-eznps] Fix TLB Errata

From: Noam Camus Due to a HW bug in NPS400 we get from time to time false TLB miss. Workaround this by validating each miss. Signed-off-by: Noam Camus --- arch/arc/mm/tlbex.S | 10 ++ 1 files changed, 10 insertions(+), 0 deletions(-) diff --git a/arch/arc/mm/tlbex.S b/arch/arc/mm/tl

[PATCH 02/10] ARC: send ipi to all cpus sharing task mm in case of page fault

From: Noam Camus This patch is derived due to performance issue. The use case is a page fault that resides on more than the local cpu. Trying to broadcast all CPUs results on performance degradation. So we try to avoid this by sending only to the relevant CPUs. Signed-off-by: Noam Camus --- ar

[PATCH 10/10] ARC: [plat-eznps] Handle memory error as an exception

From: Noam Camus This commit adds the configuration CONFIG_EZNPS_MEM_ERROR. If set, it will cause the kernel to handle user memory error as a machine check exception. It is required in order to align the NPS simulator memory error handling to the one of the NPS400 real chip behavior. Signed-off-

[PATCH 09/10] ARC: [plat-eznps] use schd.wft instruction instead of sleep at idle task

From: Noam Camus When HW threads are active we want CPU to enter idle state only for the calling HW thread and not to put on sleep all HW threads sharing this core. For this need the NPS400 got dedicated instruction so only calling thread is entring sleep and all other are still awake and can exe

[PATCH 04/10] ARC: typos fix in kernel/entry-compact.S

From: Liav Rehana Signed-off-by: Liav Rehana Signed-off-by: Noam Camus --- arch/arc/kernel/entry-compact.S | 22 +++--- 1 files changed, 11 insertions(+), 11 deletions(-) diff --git a/arch/arc/kernel/entry-compact.S b/arch/arc/kernel/entry-compact.S index 9211707..f285dbb 10

[PATCH 05/10] ARC: [plat-eznps] typo fix at Kconfig

From: Noam Camus Signed-off-by: Noam Camus --- arch/arc/plat-eznps/Kconfig |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arc/plat-eznps/Kconfig b/arch/arc/plat-eznps/Kconfig index 1595a38..feaa471 100644 --- a/arch/arc/plat-eznps/Kconfig +++ b/arch/arc/plat-ez

[PATCH 08/10] ARC: [plat-eznps] spinlock aware for MTM

From: Noam Camus This way when we execute "ex" during trying to hold lock we can switch to other HW thread and utilize the core intead of just spinning on a lock. We noticed about 10% improvement of execution time with hackbench test. Signed-off-by: Noam Camus --- arch/arc/include/asm/spinloc

[PATCH 00/10] ARC plat-eznps upstream cont.

From: Noam Camus With this patch set I continue the effort of upstreaming the eznps platform for arch/arc. it combine of patches for typos and other for HW erratas and some for performance. All selected as ones that may be obvious for merge with arc next. This was based on for-curr branch as th

[PATCH 01/10] ARC: set level of log per CPU during boot to be debug level

From: Noam Camus The reasons are: 1) speeding up boot time, becomes critical for many CPUs machine, e.g. NPS400 with 4K CPUs 2) shorten kernel log at boot time, again easy to scan for large scale machines such NPS400 Signed-off-by: Noam Camus --- arch/arc/kernel/setup.c |6 +++--- ar