[PATCH 5/6] ARCv2: IRQ: Use build registers for getting numbers of interrupts

2017-01-27 Thread Yuriy Kolerov
This enhancement allows to mask all available common interrupts in IDU interrupt controller in boot time since the kernel can discover a number of them from the build register. Also now there is no need to specify in device tree a list of used core interrupts by IDU. E.g. before: idu_intc: idu

[PATCH 6/6] ARCv2: IRQ: Set a default priority for all core interrupts

2017-01-27 Thread Yuriy Kolerov
After reset all interrupts in the core interrupt controller has the highest priority P0. If the platform supports Fast IRQs and has more than 1 banks of registers then CPU automatically switch banks of registers when P0 interrupt comes. The problem is that the kernel expects that by default switch

[PATCH 3/6] ARCv2: IRQ: Add macro for the first external interrupt number

2017-01-27 Thread Yuriy Kolerov
Signed-off-by: Yuriy Kolerov --- arch/arc/include/asm/irq.h | 1 + arch/arc/kernel/intc-arcv2.c | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arc/include/asm/irq.h b/arch/arc/include/asm/irq.h index c0fa0d2..e61ad30 100644 --- a/arch/arc/include/asm/irq.h +++ b/arch

[PATCH 2/6] ARCv2: MCIP: Add structure for build register of IDU

2017-01-27 Thread Yuriy Kolerov
This structure is necessary for retrieving of supported number of common interrupts in IDU interrupt controller. Signed-off-by: Yuriy Kolerov --- include/soc/arc/mcip.h | 17 + 1 file changed, 17 insertions(+) diff --git a/include/soc/arc/mcip.h b/include/soc/arc/mcip.h index 69

[PATCH 0/6] Use build registers for getting numbers of interrupts

2017-01-27 Thread Yuriy Kolerov
A summary: * Use build registers for getting numbers of interrupts both for core interrupt controller and for IDU interrupt controller. * Set a default priority for all core interrupt to prevent unexpected switching of banks of registers. * Remove option for setting number of interru

[PATCH 4/6] ARCv2: IRQ: Remove option for setting number of interrupts

2017-01-27 Thread Yuriy Kolerov
When you set a value of ARC_NUMBER_OF_INTERRUPTS option it affects only a size of the interrupts table but macros for number of virtual interrupts (NR_IRQS) and for number of hardware interrupts (NR_CPU_IRQS) remain unchanged. Moreover usage of ARC_NUMBER_OF_INTERRUPTS is bad for portability since

[PATCH 1/6] ARCv2: IRQ: Move structures for core intc to the header

2017-01-27 Thread Yuriy Kolerov
Also add new macro ARC_REG_STATUS32 for the address of STATUS32 auxiliary register. It is better to use it instead of magic numbers. Signed-off-by: Yuriy Kolerov --- arch/arc/include/asm/arcregs.h | 26 ++ arch/arc/kernel/intc-arcv2.c | 23 +++ 2 fil

[GIT PULL] ARC updates for 4.10-rc6

2017-01-27 Thread Vineet Gupta
Hi Linus, Hopefully last set of changes for ARC for 4.10. Please pull. Thx, -Vineet ---> The following changes since commit 7a308bb3016f57e5be11a677d15b821536419d36: Linux 4.10-rc5 (2017-01-22 12:54:15 -0800) are available in the git repository at: git://git.kernel.org/pub/scm/lin

Re: stmmac: GMAC_RGSMIIIS reports bogus values

2017-01-27 Thread Alexey Brodkin
HiĀ Giuseppe, On Wed, 2017-01-25 at 21:39 +0300, Alexey Brodkin wrote: > Hi Giuseppe, > > On Mon, 2016-11-14 at 09:14 +0100, Giuseppe CAVALLARO wrote: > > > > Hello Alexey > > > > Sorry for my late reply. In that case, I think that the stmmac > > is using own RGMII/SGMII support (PCS) to dialog