On 04/19, Jose Abreu wrote:
>
> @Stephen: can you give some input so that I can submit a v6?
>
I don't prefer putting the second register in the same DT node,
but that's really up to the DT reviewers to approve such a
design. The current binding has been acked by Rob right?
Assuming the new bin
This add DT bindings documentation for ARC PGU display controller.
Signed-off-by: Alexey Brodkin
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
Cc: Kumar Gala
Cc: devicet...@vger.kernel.org
Cc: linux-snps-arc@lists.infradead.org
Acked-by: Rob Herring
---
No changes v5 -> v6.
Changes v4 -
This updates MAINTEINERS file with information about maintainer of
ARC PGU display controller driver.
Signed-off-by: Alexey Brodkin
Cc: linux-snps-arc@lists.infradead.org
---
No changes v5 -> v6.
No changes v4 -> v5.
No changes v3 -> v4.
No changes v2 -> v3.
No changes v1 -> v2.
MAINTAINER
From: Carlos Palminha
ARC PGU could be found on some development boards from Synopsys.
This is a simple byte streamer that reads data from a framebuffer
and sends data to the single encoder.
Signed-off-by: Carlos Palminha
Signed-off-by: Alexey Brodkin
Cc: Daniel Vetter
Cc: David Airlie
Cc: d
This series add support of ARC PGU display controller.
ARC PGU is a quite simple byte streamer that gets data from the framebuffer
and pushes it to hte connected encoder (DP or HDMI).
It was tested on ARC SDP boards (axs101/103 in particular).
Note following series (v6) that introduces drm_connec
Synopsys DesignWare ARC SDP boards sport ARC SDP display
controller attached to ADV7511 HDMI encoder.
That change adds desctiption of both ARC PGU and ADV7511 in
ARC SDP'd base-board Device Tree.
Signed-off-by: Alexey Brodkin
Cc: Rob Herring
Cc: Pawel Moll
Cc: Mark Rutland
Cc: Ian Campbell
C
Hi Vineet,
On 18-04-2016 12:49, Vineet Gupta wrote:
> On Monday 18 April 2016 04:00 PM, Jose Abreu wrote:
+ if (readl((void *)FPGA_VER_INFO) <= FPGA_VER_27M) {
Please don't readl directly from addresses. I think I mentioned
that before and didn't get back to you when you replied a
