Fix the NO INT in the Multi-BLK IO in SD/MMC, and Multi-BLK
read in SDIO on imx53.
The CMDTYPE of the CMD register (offset 0xE) should be set to
"11" when the STOP CMD12 is issued on imx53 to abort one
open ended multi-blk IO. Otherwise one the TC INT wouldn't
be generated.
In exact block transfe
Add one flag to indicate the GPIO CD/WP is enabled or not
on imx platforms, and reuse the writel/readl as the general
APIs for imx SOCs.
Signed-off-by: Richard Zhu
---
drivers/mmc/host/sdhci-esdhc-imx.c | 43 ++--
drivers/mmc/host/sdhci-pltfm.h |2 +-
2
Add the abort CMDTYPE bits definition of command register (offset 0xE)
Signed-off-by: Richard Zhu
---
drivers/mmc/host/sdhci.h |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 6e0969e..25e8bde 100644
--- a/drivers/
sdhci-esdhc-imx does not need SDHCI_QUIRK_NO_CARD_NO_RESET. Make it OF-specific.
Signed-off-by: Richard Zhu
Tested-by: Wolfram Sang
---
drivers/mmc/host/sdhci-esdhc.h|3 +--
drivers/mmc/host/sdhci-of-esdhc.c |3 ++-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/driv
Hi Philip,
> -Original Message-
> From: Philip Rakity [mailto:prak...@marvell.com]
> Sent: Thursday, March 17, 2011 3:09 AM
> To: Nath, Arindam
> Cc: c...@laptop.org; zhangfei@gmail.com; subha...@codeaurora.org;
> linux-mmc@vger.kernel.org; Su, Henry; Lu, Aaron; anath@gmail.com
>
Part 3 of the SD Specification (SD Card Association; www.sdcard.org) describes
how to use the security function of an SD card using application specific
commands in conjunction with CPRM algorithms and keys licensed from the 4C
Entity (www.4centity.com). This allows userspace applications to acces
Fixes:
drivers/mmc/card/mmc_test.c: In function ‘mmc_test_seq_perf’:
drivers/mmc/card/mmc_test.c:1878:28: warning: variable ‘ts’ set but not
used [-Wunused-but-set-variable]
There's no reason to be calling timespec_sub() here, because
mmc_test_print_avg_rate() is going to do that itself.
Signed-
Hi Arindam,
was getting kernel crash on SD card -- fix is below
Philip
On Mar 4, 2011, at 3:32 AM, Arindam Nath wrote:
> Host Controller v3.00 adds another Capabilities register. Apart
> from other things, this new register indicates whether the Host
> Controller supports SDR50, SDR104, and DD
> > > New IO FPGA implementation for Versatile Express boards contain
> > > MMCI (PL180) cell with FIFO extended to 128 words (512 bytes).
> > >
> > > Signed-off-by: Pawel Moll
> >
> > Tested-by: Matt Waddel
> >
> > This patch improves MMC performance on my vexpress system. Also
> > fixes "mmc
On Wed, Mar 16, 2011 at 10:25:16AM -0600, Matt Waddel wrote:
> On 03/11/2011 10:18 AM, Pawel Moll wrote:
> > New IO FPGA implementation for Versatile Express boards contain
> > MMCI (PL180) cell with FIFO extended to 128 words (512 bytes).
> >
> > Signed-off-by: Pawel Moll
>
> Tested-by: Matt Wa
On 03/11/2011 10:18 AM, Pawel Moll wrote:
> New IO FPGA implementation for Versatile Express boards contain
> MMCI (PL180) cell with FIFO extended to 128 words (512 bytes).
>
> Signed-off-by: Pawel Moll
Tested-by: Matt Waddel
This patch improves MMC performance on my vexpress system. Also
fixe
On Mar 16, 2011, at 8:33 AM, Nath, Arindam wrote:
> Hi Philip,
>
>
>> -Original Message-
>> From: Philip Rakity [mailto:prak...@marvell.com]
>> Sent: Wednesday, March 16, 2011 9:01 PM
>> To: Nath, Arindam
>> Cc: c...@laptop.org; zhangfei@gmail.com; subha...@codeaurora.org;
>> linux-
Hi Philip,
> -Original Message-
> From: Philip Rakity [mailto:prak...@marvell.com]
> Sent: Wednesday, March 16, 2011 9:01 PM
> To: Nath, Arindam
> Cc: c...@laptop.org; zhangfei@gmail.com; subha...@codeaurora.org;
> linux-mmc@vger.kernel.org; Su, Henry; Lu, Aaron; anath@gmail.com
>
Arindam,
Thanks,
There are a few other functions in the same file that should also be changed
for the same reason.
Philip
On Mar 16, 2011, at 8:24 AM, Nath, Arindam wrote:
> Hi Philip,
>
>
>> -Original Message-
>> From: Philip Rakity [mailto:prak...@marvell.com]
>> Sent: Wednesday,
Hi Philip,
> -Original Message-
> From: Philip Rakity [mailto:prak...@marvell.com]
> Sent: Wednesday, March 16, 2011 8:48 PM
> To: Nath, Arindam
> Cc: c...@laptop.org; zhangfei@gmail.com; subha...@codeaurora.org;
> linux-mmc@vger.kernel.org; Su, Henry; Lu, Aaron; anath@gmail.com
>
On Mar 16, 2011, at 8:00 AM, Nath, Arindam wrote:
> Hi Philip,
>
>
>> -Original Message-
>> From: Philip Rakity [mailto:prak...@marvell.com]
>> Sent: Wednesday, March 16, 2011 8:22 PM
>> To: Nath, Arindam
>> Cc: c...@laptop.org; zhangfei@gmail.com; subha...@codeaurora.org;
>> linux-
Hi Philip,
> -Original Message-
> From: Philip Rakity [mailto:prak...@marvell.com]
> Sent: Wednesday, March 16, 2011 8:22 PM
> To: Nath, Arindam
> Cc: c...@laptop.org; zhangfei@gmail.com; subha...@codeaurora.org;
> linux-mmc@vger.kernel.org; Su, Henry; Lu, Aaron; anath@gmail.com
>
On Mar 16, 2011, at 7:32 AM, Nath, Arindam wrote:
> Hi Philip,
>
>
>> -Original Message-
>> From: Philip Rakity [mailto:prak...@marvell.com]
>> Sent: Wednesday, March 16, 2011 7:56 PM
>> To: Nath, Arindam
>> Cc: c...@laptop.org; zhangfei@gmail.com; subha...@codeaurora.org;
>> linux-
Hi Philip,
> -Original Message-
> From: Philip Rakity [mailto:prak...@marvell.com]
> Sent: Wednesday, March 16, 2011 7:56 PM
> To: Nath, Arindam
> Cc: c...@laptop.org; zhangfei@gmail.com; subha...@codeaurora.org;
> linux-mmc@vger.kernel.org; Su, Henry; Lu, Aaron; anath@gmail.com
>
On Mar 4, 2011, at 3:32 AM, Arindam Nath wrote:
> We decide on the current limit to be set for the card based on the
> Capability of Host Controller to provide current at 1.8V signalling,
> and the maximum current limit of the card as indicated by CMD6
> mode 0. We then set the current limit for
>> On Fri, Mar 11, 2011 at 4:51 PM, Guennadi Liakhovetski
>> wrote:
>> > TMIO MMC chips contain an SD / SDIO IP core from Panasonic, similar to
>> > the one, used in MN5774 and other MN57xx controllers. These IP cores
>> > are
>> > included in many multifunction devi
Im fine with it as long as it doesnt complicate my plan to add PXA DMA
to the driver.
--
Ian Molton
Linux, Automotive, and other hacking:
http://www.mnementh.co.uk/
On 15 March 2011 09:01, Magnus Damm wrote:
> On Mon, Mar 14, 2011 at 7:51 AM, Guennadi Liakhovetski
> wrote:
>> On Sun, 13 Mar
Hi Zhangfei,
> -Original Message-
> From: zhangfei gao [mailto:zhangfei@gmail.com]
> Sent: Wednesday, March 16, 2011 4:14 PM
> To: Nath, Arindam
> Cc: Subhash Jadavani; c...@laptop.org; prak...@marvell.com; linux-
> m...@vger.kernel.org; Su, Henry; Lu, Aaron; anath@gmail.com
> Sub
On Wed, Mar 16, 2011 at 2:30 AM, Nath, Arindam wrote:
> Hi Zhangfei,
>
>
>> -Original Message-
>> From: zhangfei gao [mailto:zhangfei@gmail.com]
>> Sent: Wednesday, March 16, 2011 8:33 AM
>> To: Subhash Jadavani; Nath, Arindam
>> Cc: c...@laptop.org; prak...@marvell.com; linux-mmc@vger
On Wed, Mar 16, 2011 at 2:20 AM, Nath, Arindam wrote:
> Hi Zhangfei,
>
>
>> -Original Message-
>> From: zhangfei gao [mailto:zhangfei@gmail.com]
>> Sent: Wednesday, March 16, 2011 8:21 AM
>> To: Nath, Arindam
>> Cc: c...@laptop.org; prak...@marvell.com; subha...@codeaurora.org;
>> linu
This allows a ROM-able zImage to be written to eSD and for SuperH Mobile
ARM to boot directly from the SDHI hardware block.
This is achieved by the MaskROM loading the first portion of the image into
MERAM and then jumping to it. This portion contains loader code which
copies the entire image to
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