Hi Nicolas,
Am Dienstag, den 24.06.2014, 11:53 -0400 schrieb Nicolas Dufresne:
> Le vendredi 13 juin 2014 à 18:08 +0200, Philipp Zabel a écrit :
> > This patch adds support for the CODA960 VPU in Freescale i.MX6 SoCs.
>
> I might be confused, but is this driver sharing the same device node for
>
Le vendredi 13 juin 2014 à 18:08 +0200, Philipp Zabel a écrit :
> This patch adds support for the CODA960 VPU in Freescale i.MX6 SoCs.
I might be confused, but is this driver sharing the same device node for
the encoder and the decoder ? If so why ? I know the spec might not be
preventing it, but
This patch adds support for the CODA960 VPU in Freescale i.MX6 SoCs.
It enables h.264 and MPEG4 encoding and decoding support. Besides the usual
register shifting, the CODA960 gains frame memory control and GDI registers
that are set up for linear mapping right now, needs ENC_PIC_SRC_INDEX to be
s
