On Mon, Oct 7, 2019 at 7:09 PM Maxime Ripard wrote:
>
> Hi,
>
> On Fri, Oct 04, 2019 at 02:33:41PM +0800, Chen-Yu Tsai wrote:
> > On Fri, Oct 4, 2019 at 12:37 AM Maxime Ripard wrote:
> > > On Thu, Oct 03, 2019 at 11:51:05PM +0800, Chen-Yu Tsai wrote:
> > &g
On Fri, Oct 4, 2019 at 12:37 AM Maxime Ripard wrote:
>
> Hi,
>
> On Thu, Oct 03, 2019 at 11:51:05PM +0800, Chen-Yu Tsai wrote:
> > On Thu, Oct 3, 2019 at 11:48 PM Maxime Ripard wrote:
> > >
> > > It turns out that what was thought to be the module clock was
our binding.
>
> Fixes: c5e8f4ccd775 ("media: dt-bindings: media: Add Allwinner A10 CSI
> binding")
> Reported-by: Chen-Yu Tsai
> Signed-off-by: Maxime Ripard
> ---
> .../devicetree/bindings/media/allwinner,sun4i-a10-csi.yaml | 7 ++-
> 1 file changed, 2 inserti
On Fri, Jul 26, 2019 at 5:50 PM Maxime Jourdan wrote:
>
> On Wed, Jul 24, 2019 at 1:27 PM Hans Verkuil wrote:
> >
> > (There were too many recipients for my provider, so resending
> > again without the zillion CCs, and in batches of 5 patches. Stupid
> > spammer detection...)
> >
> > This series
On Fri, Jul 26, 2019 at 1:06 AM Ezequiel Garcia wrote:
>
> On Thu, 2019-07-25 at 12:57 -0300, Mauro Carvalho Chehab wrote:
> > Em Mon, 15 Jul 2019 18:23:16 -0300
> > Ezequiel Garcia escreveu:
> >
> > > Many users have been complaining about not being able to find
> > > certain menu options. One s
On Tue, Feb 5, 2019 at 4:55 PM Sakari Ailus
wrote:
>
> Hi Chen-Yu,
>
> On Fri, Jan 18, 2019 at 04:52:06PM +0800, Chen-Yu Tsai wrote:
> > The register value lists for all the supported resolution settings all
> > include a register address/value pair for setting the JPEG co
, even when the on-bus data is framed correctly, we have no way to
accertain the actual amount of data captured, unless we scan the buffer
for JPEG EOI markers, or sequential zeros. For now we leave bytesused
alone, and leave it up to userspace applications to parse the data.
Signed-off-by: Chen-Yu
0x9c, the last known
register on the V3s and H3.
On the A31, the register range is extended to support additional
capture channels. Since this is not yet supported, ignore it for now.
Fixes: 5cc7522d8965 ("media: sun6i: Add support for Allwinner CSI V3s")
Cc:
Signed-off-by: Ch
The CSI controller can take raw data from the data bus and output RGB565
format. The controller does not distinguish between RGB565 LE and BE.
Instead this is determined by the media bus format, i.e. the format or
order the sensor is sending data in.
Signed-off-by: Chen-Yu Tsai
---
.../platform
up forgetting to
send out this one.
Please have a look.
Regards
ChenYu
Chen-Yu Tsai (3):
media: sun6i: Fix CSI regmap's max_register
media: sun6i: Add support for RGB565 formats
media: sun6i: Add support for JPEG media bus format
.../platform/sunxi/sun6i-csi/sun6i_csi.c | 27 +
On Fri, Jan 25, 2019 at 2:57 AM Jernej Škrabec wrote:
>
> Dne ponedeljek, 21. januar 2019 ob 10:57:57 CET je Chen-Yu Tsai napisal(a):
> > On Mon, Jan 21, 2019 at 5:50 PM Maxime Ripard
> wrote:
> > > Hi,
> > >
> > > I'm a bit late to the party, sorr
On Tue, Jan 22, 2019 at 9:38 PM Rob Herring wrote:
>
> On Mon, Jan 21, 2019 at 8:16 PM Chen-Yu Tsai wrote:
> >
> > On Tue, Jan 22, 2019 at 8:19 AM Rob Herring wrote:
> > >
> > > On Mon, Jan 21, 2019 at 05:57:57PM +0800, Chen-Yu Tsai wrote:
> > > &g
On Mon, Dec 3, 2018 at 5:46 PM Jagan Teki wrote:
>
> On Fri, Nov 30, 2018 at 1:28 PM Chen-Yu Tsai wrote:
> >
> > Some camera modules have the SoC feeding a master clock to the sensor
> > instead of having a standalone crystal. This clock signal is generated
> > f
On Mon, Dec 3, 2018 at 5:44 PM Jagan Teki wrote:
>
> On Fri, Nov 30, 2018 at 1:29 PM Chen-Yu Tsai wrote:
> >
> > The CSI controller found on the H3 (and H5) is a reduced version of the
> > one found on the A31. It only has 1 channel, instead of 4 channels for
> >
On Tue, Jan 22, 2019 at 8:19 AM Rob Herring wrote:
>
> On Mon, Jan 21, 2019 at 05:57:57PM +0800, Chen-Yu Tsai wrote:
> > On Mon, Jan 21, 2019 at 5:50 PM Maxime Ripard
> > wrote:
> > >
> > > Hi,
> > >
> > > I'm a bit late to the party
On Tue, Jan 22, 2019 at 1:33 AM Jernej Škrabec wrote:
>
> Dne ponedeljek, 21. januar 2019 ob 10:57:57 CET je Chen-Yu Tsai napisal(a):
> > On Mon, Jan 21, 2019 at 5:50 PM Maxime Ripard
> wrote:
> > > Hi,
> > >
> > > I'm a bit late to the party, sorr
On Mon, Jan 21, 2019 at 5:50 PM Maxime Ripard wrote:
>
> Hi,
>
> I'm a bit late to the party, sorry for that.
>
> On Sat, Jan 12, 2019 at 09:56:11AM +0800, Chen-Yu Tsai wrote:
> > On Sat, Jan 12, 2019 at 1:30 AM Jernej Skrabec
> > wrote:
> > >
>
gradient)
- static color squares
- color squares with a rolling bar
Signed-off-by: Chen-Yu Tsai
---
drivers/media/i2c/ov5640.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/media/i2c/ov5640.c b/drivers/media/i2c/ov5640.c
index a1fd69a21df1..13311483792c 100644
--- a
one place,
instead of being listed in the register dumps.
Please have a look.
Regards
ChenYu
Chen-Yu Tsai (6):
media: ov5640: Move test_pattern_menu before
ov5640_set_ctrl_test_pattern
media: ov5640: Add register definition for test pattern register
media: ov5640: Disable transpare
us to add a
matching list of values to program into the hardware, while keeping the
two lists together for ease of maintenance.
Signed-off-by: Chen-Yu Tsai
---
drivers/media/i2c/ov5640.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/media/i2c/ov5640.c b
The OV5640 can generate many types of test patterns, some with
additional modifiers, such as a rolling bar, or gamma gradients.
Add the bit definitions for all bits in the test pattern register,
and use them to compose the values to be written to the register.
Signed-off-by: Chen-Yu Tsai
arent feature of the test pattern.
Signed-off-by: Chen-Yu Tsai
---
drivers/media/i2c/ov5640.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/media/i2c/ov5640.c b/drivers/media/i2c/ov5640.c
index 22d07b3cc8a2..a1fd69a21df1 100644
--- a/drivers/media/i2c/ov5640.c
padding data on the last line, while mode 3 does not add padding data.
As these register values were from dumps of running systems, and the
difference between the modes is quite small, using mode 3 for all
configurations should be OK.
Signed-off-by: Chen-Yu Tsai
---
drivers/media/i2c/ov5640.c | 34
per line than expected, and having the extra data
dropped. This ultimately results in corrupted data.
Set the two values when the media bus is configured for JPEG data,
meaning the sensor would be in JPEG mode.
Signed-off-by: Chen-Yu Tsai
---
drivers/media/i2c/ov5640.c | 21
Hi,
On Thu, Jan 17, 2019 at 2:35 AM Mauro Carvalho Chehab
wrote:
>
> This is an automatic generated email to let you know that the following patch
> were queued:
>
> Subject: media: dt-bindings: media: sun6i: Separate H3 compatible from A31
> Author: Chen-Yu Tsai
> Date
On Sat, Jan 12, 2019 at 1:30 AM Jernej Skrabec wrote:
>
> A64 IR is compatible with A13, so add A64 compatible with A13 as a
> fallback.
We ask people to add the SoC-specific compatible as a contigency,
in case things turn out to be not so "compatible".
To be consistent with all the other SoCs a
On Fri, Dec 14, 2018 at 6:10 AM wrote:
>
> Hi Chen-Yu,
>
> On Fri, Nov 30, 2018 at 03:58:43PM +0800, Chen-Yu Tsai wrote:
> > The CSI (camera sensor interface) controller found on the H3 (and H5)
> > is a reduced version of the one found on the A31. It only has 1 channel,
&
On Wed, Dec 5, 2018 at 5:25 PM Paul Kocialkowski
wrote:
>
> Add the H5-specific system control node description to its device-tree
> with support for the SRAM C1 section, that will be used by the video
> codec node later on.
>
> The CPU-side SRAM address was obtained empirically while the size was
Add device-tree compatible and variant for A64 support
> arm64: dts: allwinner: h5: Add Video Engine node
> arm64: dts: allwinner: a64: Add Video Engine node
Other than the error in patch 7,
Acked-by: Chen-Yu Tsai
On Wed, Dec 5, 2018 at 5:48 PM Paul Kocialkowski
wrote:
>
> Hi,
>
> On Wed, 2018-12-05 at 17:45 +0800, Chen-Yu Tsai wrote:
> > On Wed, Dec 5, 2018 at 5:25 PM Paul Kocialkowski
> > wrote:
> > > Add the H5-specific system control node description to its device-tre
On Mon, Dec 3, 2018 at 6:08 PM Jagan Teki wrote:
>
> Amarula A64-Relic board by default bound with OV5640 camera,
> so add support for it with below pin information.
>
> - PE13, PE12 via i2c-gpio bitbanging
> - CLK_CSI_MCLK as external clock
> - PE1 as external clock pin muxing
> - DLDO3 as vcc-cs
On Mon, Dec 3, 2018 at 6:07 PM Jagan Teki wrote:
>
> This series support CSI on Allwinner A64.
>
> The CSI controller seems similar to that of in H3, so fallback
> compatible is used to load the driver.
>
> Unlike other SoC's A64 has set of GPIO Pin gropus SDA, SCK intead
> of dedicated I2C contro
On Mon, Dec 3, 2018 at 6:08 PM Jagan Teki wrote:
>
> Most of the Allwinner A64 CSI controllers are supply with
> VCC-PE pin. which need to supply for some of the boards to
> trigger the power.
>
> So, document the supply property as vcc-csi so-that the required
> board can eable it via device tree
On Mon, Dec 3, 2018 at 5:52 PM Jagan Teki wrote:
>
> On Fri, Nov 30, 2018 at 1:29 PM Chen-Yu Tsai wrote:
> >
> > The Bananapi M2+ comes with an optional sensor based on the ov5640 from
> > Omnivision. Enable the support for it in the DT.
> >
> > Signed-off-by:
On Mon, Dec 3, 2018 at 5:42 PM Jagan Teki wrote:
>
> On Fri, Nov 30, 2018 at 1:29 PM Chen-Yu Tsai wrote:
> >
> > The CSI controller found on the H3 (and H5) is a reduced version of the
> > one found on the A31. It only has 1 channel, instead of 4 channels for
> >
: Chen-Yu Tsai
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index c9c9ec71945f..b70899500825 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5
Drop the A31 fallback compatible.
Fixes: f89120b6f554 ("ARM: dts: sun8i: Add the H3/H5 CSI controller")
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
b/arch/a
GPIO lines controlling them are just
an educated guess.
Signed-off-by: Chen-Yu Tsai
---
.../boot/dts/sunxi-libretech-all-h3-cc.dtsi | 81 +++
1 file changed, 81 insertions(+)
diff --git a/arch/arm/boot/dts/sunxi-libretech-all-h3-cc.dtsi
b/arch/arm/boot/dts/sunxi-libretech-all-
Split out the H3 compatible as a separate entry, with no fallback.
Fixes: b7eadaa3a02a ("media: dt-bindings: media: sun6i: Add A31 and H3
compatibles")
Signed-off-by: Chen-Yu Tsai
---
Documentation/devicetree/bindings/media/sun6i-csi.txt | 2 +-
1 file change
the first frame captured seems to always be
incomplete, with either parts cropped, out of position, or missing
color components.
Regards
ChenYu
Chen-Yu Tsai (6):
media: dt-bindings: media: sun6i: Separate H3 compatible from A31
media: sun6i: Add H3 compatible
ARM: dts: sunxi: h3/h5: Drop A3
ts.
Add a compatible string entry for the H3.
Signed-off-by: Chen-Yu Tsai
---
drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c
b/drivers/media/platform/sunxi/sun6i-csi/sun6i_csi.c
index 69
The Bananapi M2+ comes with an optional sensor based on the ov5640 from
Omnivision. Enable the support for it in the DT.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi | 87 +++
1 file changed, 87 insertions(+)
diff --git a/arch/arm/boot/dts/sunxi
On Fri, Nov 16, 2018 at 12:52 AM Chen-Yu Tsai wrote:
>
> On Thu, Nov 15, 2018 at 10:50 PM Paul Kocialkowski
> wrote:
> >
> > Add the H5-specific system control node description to its device-tree
> > with support for the SRAM C1 section, that will be used by the vi
On Thu, Nov 22, 2018 at 7:45 PM Jagan Teki wrote:
>
> On Wed, Nov 14, 2018 at 8:29 PM Maxime Ripard
> wrote:
> >
> > From: Mylène Josserand
> >
> > The H3 and H5 features the same CSI controller that was initially found on
> > the A31.
> >
> > Add a DT node for it.
> >
> > Signed-off-by: Mylène
On Fri, Nov 16, 2018 at 5:39 PM Maxime Ripard wrote:
>
> On Thu, Nov 15, 2018 at 03:50:06PM +0100, Paul Kocialkowski wrote:
> > Now that we have specific nodes for the H3 and H5 system-controller
> > that allow proper access to the EMAC clock configuration register,
> > we no longer need a common
On Thu, Nov 15, 2018 at 10:50 PM Paul Kocialkowski
wrote:
>
> Add the H5-specific system control node description to its device-tree
> with support for the SRAM C1 section, that will be used by the video
> codec node later on.
>
> Signed-off-by: Paul Kocialkowski
> ---
> arch/arm64/boot/dts/allw
On Thu, Nov 15, 2018 at 10:50 PM Paul Kocialkowski
wrote:
>
> Add the description for the SRAM C1 section to the A64 device-tree.
>
> Signed-off-by: Paul Kocialkowski
> ---
> arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 14 ++
> 1 file changed, 14 insertions(+)
>
> diff --git a/ar
ic binding for the syscon node
> attached to the EMAC instead of the generic syscon binding.
>
> Signed-off-by: Paul Kocialkowski
Reviewed-by: Chen-Yu Tsai
> that range.
>
> Extend the register size to its full range (0x1000) as a result.
>
> Signed-off-by: Paul Kocialkowski
Other than the subject format,
Acked-by: Chen-Yu Tsai
On Thu, Nov 15, 2018 at 10:50 PM Paul Kocialkowski
wrote:
>
> This cosmetic change removes the heading 0 in the video-codec unit
> address, as it's done for other nodes.
>
> Signed-off-by: Paul Kocialkowski
Other than the subject format we can fix when applying,
Acked-by: Chen-Yu Tsai
uot;,
or "sun8i: a33:" in this case. This format seems to be used more often
than your alternative format.
I can fix it up when applying.
Acked-by: Chen-Yu Tsai
ChenYu
On Thu, Nov 15, 2018 at 10:51 PM Paul Kocialkowski
wrote:
>
> This adds nodes for the Video Engine and the associated reserved memory
> for the H5. Up to 96 MiB of memory are dedicated to the CMA pool.
>
> The pool is located at the end of the first 256 MiB of RAM so that the
> VPU can access it.
or
> the A31.
>
> Reviewed-by: Rob Herring
> Signed-off-by: Maxime Ripard
Reviewed-by: Chen-Yu Tsai
On Wed, Nov 14, 2018 at 10:59 PM Maxime Ripard
wrote:
>
> The first device that used that IP was the A31. Add it to our list of
> compatibles.
>
> Signed-off-by: Maxime Ripard
Reviewed-by: Chen-Yu Tsai
E0", "PE1", "PE2", "PE3", "PE4",
You should separate out PE1, which provides the MCLK. Not all camera modules
need it. Some might have a standalone crystal to provide the reference clock.
Designs could then use that pin for
On Tue, Nov 13, 2018 at 4:24 PM Maxime Ripard wrote:
>
> Hi,
>
> Here is a series introducing the support for the A10 (and SoCs of the same
> generation) CMOS Sensor Interface (called CSI, not to be confused with
> MIPI-CSI, which isn't support by that IP).
>
> That interface is pretty straightfor
On Mon, May 7, 2018 at 5:44 AM, Paul Kocialkowski
wrote:
> This introduces platform-specific compatibles for the A13, A20 and A33
> SRAM driver. No particular adaptation for these platforms is required at
> this point, although this might become the case in the future.
>
> Signed-off-by: Paul Koci
On Wed, Jan 31, 2018 at 11:08 AM, Liviu Dudau wrote:
> On Fri, Jan 26, 2018 at 11:00:41AM +0800, Yong wrote:
>> Hi Maxime,
>>
>> On Fri, 26 Jan 2018 09:46:58 +0800
>> Yong wrote:
>>
>> > Hi Maxime,
>> >
>> > Do you have any experience in solving this problem?
>> > It seems the PHYS_OFFSET maybe u
On Mon, Nov 13, 2017 at 3:30 PM, Yong Deng wrote:
> Allwinner V3s SoC have two CSI module. CSI0 is used for MIPI interface
> and CSI1 is used for parallel interface. This is not documented in
> datasheet but by testing and guess.
>
> This patch implement a v4l2 framework driver for it.
>
> Current
On Mon, Dec 18, 2017 at 5:43 PM, Yong wrote:
> Hi,
>
> On Mon, 18 Dec 2017 10:24:37 +0100
> Maxime Ripard wrote:
>
>> Hi,
>>
>> On Mon, Dec 18, 2017 at 04:49:21PM +0800, Yong wrote:
>> > > > + compatible = "allwinner,sun8i-v3s-csi";
>> > > > + reg = <0x01cb4000 0x1000>
On Mon, Nov 13, 2017 at 3:32 PM, Yong Deng wrote:
> Add binding documentation for Allwinner V3s CSI.
>
> Signed-off-by: Yong Deng
> ---
> .../devicetree/bindings/media/sun6i-csi.txt| 51
> ++
> 1 file changed, 51 insertions(+)
> create mode 100644 Documentation/devi
b..2bf25ca64133 100644
> --- a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
> +++ b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
> @@ -100,6 +100,13 @@
> status = "okay";
> };
>
> +&ir {
See my other reply about the name.
Otherwise,
Acked-by: Chen-Yu Tsa
On Mon, Dec 18, 2017 at 6:45 AM, Philipp Rossak wrote:
> The CIR Pin of the A83T is located at PL12.
>
> Signed-off-by: Philipp Rossak
> ---
> arch/arm/boot/dts/sun8i-a83t.dtsi | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi
> b/arch/arm/boot/dts/
On Fri, Jun 30, 2017 at 5:19 AM, Rob Herring wrote:
> On Tue, Jun 27, 2017 at 07:07:34PM +0800, Yong Deng wrote:
>> Add binding documentation for Allwinner CSI.
>
> For the subject:
>
> dt-bindings: media: Add Allwinner Camera Sensor Interface (CSI)
>
> "binding documentation" is redundant.
>
>>
>
f-by: Chen-Yu Tsai
---
drivers/media/rc/sunxi-cir.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/media/rc/sunxi-cir.c b/drivers/media/rc/sunxi-cir.c
index 7830aef3db45..40f77685cc4a 100644
--- a/drivers/media/rc/sunxi-cir.c
+++ b/drivers/media/rc/sunxi-cir.c
@@ -153,6 +153,8 @@
On Mon, Jan 19, 2015 at 10:17 PM, Hans de Goede wrote:
> Hi,
>
>
> On 19-01-15 15:10, Chen-Yu Tsai wrote:
>>
>> Hi,
>>
>> On Sat, Dec 20, 2014 at 6:20 PM, Hans de Goede
>> wrote:
>>>
>>> Hi,
>>>
>>>
>>> On 19
Hi,
On Sat, Dec 20, 2014 at 6:20 PM, Hans de Goede wrote:
> Hi,
>
>
> On 19-12-14 19:17, Maxime Ripard wrote:
>>
>> Hi,
>>
>> On Thu, Dec 18, 2014 at 09:50:26AM +0100, Hans de Goede wrote:
>>>
>>> Hi,
>>>
>>> On 18-12-14 03
Hi,
On Thu, Dec 18, 2014 at 1:18 AM, Hans de Goede wrote:
> On sun6i the cir block is attached to the reset controller, add support
> for de-asserting the reset if a reset controller is specified in dt.
>
> Signed-off-by: Hans de Goede
> Acked-by: Mauro Carvalho Chehab
> Acked-by: Maxime Ripard
Hi,
On Thu, Nov 27, 2014 at 4:41 PM, Hans de Goede wrote:
> Hi,
>
>
> On 11/26/2014 10:13 PM, Maxime Ripard wrote:
>>
>> Hi,
>>
>> On Tue, Nov 25, 2014 at 09:29:21AM +0100, Hans de Goede wrote:
>>>
>>> Hi,
>>>
>>> On 11/24/2014 11:03 PM, Maxime Ripard wrote:
On Fri, Nov 21, 2014 at 10:1
Hi,
On Thu, Nov 20, 2014 at 7:55 AM, Hans de Goede wrote:
> Add a driver for mod0 clocks found in the prcm. Currently there is only
> one mod0 clocks in the prcm, the ir clock.
>
> Signed-off-by: Hans de Goede
> ---
> Documentation/devicetree/bindings/clock/sunxi.txt | 1 +
> drivers/clk/sunxi
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