Le 22/05/2014 17:28, Arnd Bergmann a écrit :
> On Thursday 22 May 2014 17:09:56 LABBE Corentin wrote:
>> Signed-off-by: LABBE Corentin
>> ---
>> drivers/crypto/Kconfig| 49 ++
>> drivers/crypto/Makefile |1 +
>> drivers/crypto/sunxi-ss.c | 1476
>>
SUNXI_SS_CLOCK_RATE_SS);
>> +if (err != 0) {
>> +dev_err(&pdev->dev, "Cannot set clock rate to ssclk\n");
>> +goto label_error_clock;
>> + }
>> +cr = clk_get_rate(ss_ctx->ssclk);
>> +
else
pr_info("Registred MD5\n");
return err;
}
static void __exit sunxi_ss_md5_exit(void)
{
crypto_unregister_ahash(&sunxi_md5_alg);
}
module_init(sunxi_ss_md5_init);
module_exit(sunxi_ss_md5_exit);
MODULE_DESCRIPTION("test MD5 module
On 06/10/14 08:53, Chen-Yu Tsai wrote:
> Hi,
>
> On Mon, Jun 9, 2014 at 6:59 PM, LABBE Corentin
> wrote:
>> Add support for the Security System included in Allwinner SoC A20.
>> The Security System is a hardware cryptographic accelerator that support
>> AES/MD5/SHA1/DES/3DES/PRNG algorithms.
>>
>> +++ b/drivers/crypto/sunxi-ss/sunxi-ss-cipher-3des.c
>> @@ -0,0 +1,118 @@
>> +/*
>> + * sunxi-ss.c - hardware cryptographic accelerator for Allwinner A20 SoC
>> + *
>> + * Copyright (C) 2013-2014 Corentin LABBE
>> + *
>> + * Support AES cipher with 128,
Le 14/06/2014 21:01, Marek Vasut a écrit :
> On Tuesday, June 10, 2014 at 02:43:15 PM, LABBE Corentin wrote:
>> Add necessary changes for configuring and compiling the Security System
>> driver.
>>
>> Signed-off-by: LABBE Corentin
>> ---
>> drivers/crypto/Kconfig | 91
>>
}
return err;
}
static void ss_rng_remove(void)
{
hwrng_unregister(&ss_rng.rng);
crypto_free_rng(ss_rng.cr);
}
module_init(ss_rng_probe);
module_exit(ss_rng_remove);
MODULE_DESCRIPTION("Allwinner Security System H/W Random Number Generator
driver");
MODULE_A
On 07/03/14 01:06, Sandy Harris wrote:
> On Tue, Jul 1, 2014 at 7:14 AM, Corentin LABBE
> wrote:
>
>> I am writing the PRNG driver for the Allwinner Security System SoC A20.
>
> The datasheet my search turned up (v1, Feb. 2013) just says: "160-bit
> hardware PRNG
Le 23/07/2014 17:51, Marek Vasut a écrit :
> On Wednesday, July 23, 2014 at 04:13:09 PM, Herbert Xu wrote:
>> On Wed, Jul 23, 2014 at 04:07:20PM +0200, Marek Vasut wrote:
>>> On Wednesday, July 23, 2014 at 03:57:35 PM, Herbert Xu wrote:
On Sat, May 24, 2014 at 02:00:03PM +0200, Marek Vasut wro
Le 24/07/2014 08:00, Herbert Xu a écrit :
> On Sat, Jul 12, 2014 at 02:59:13PM +0200, LABBE Corentin wrote:
>>
>> +/* sunxi_hash_init: initialize request context
>> + * Activate the SS, and configure it for MD5 or SHA1
>> + */
>> +int sunxi_hash_init(struct ahash_request *areq)
>> +{
>> +const
Le 24/07/2014 15:38, Herbert Xu a écrit :
> On Thu, Jul 24, 2014 at 01:04:55PM +0200, Corentin LABBE wrote:
>> Le 24/07/2014 08:00, Herbert Xu a écrit :
>>> On Sat, Jul 12, 2014 at 02:59:13PM +0200, LABBE Corentin wrote:
>>>>
>>>> +/* sunxi_hash_init: in
On 10/21/14 01:28, Vladimir Zapolskiy wrote:
> Hello LABBE,
>
> On 19.10.2014 17:16, LABBE Corentin wrote:
>> Add support for the Security System included in Allwinner SoC A20.
>> The Security System is a hardware cryptographic accelerator that support
>> AES/MD5/SHA1/DES/3DES/PRNG algorithms.
>>
Le 21/10/2014 01:52, Joe Perches a écrit :
> On Tue, 2014-10-21 at 02:28 +0300, Vladimir Zapolskiy wrote:
>> On 19.10.2014 17:16, LABBE Corentin wrote:
>>> Add support for the Security System included in Allwinner SoC A20.
>>> The Security System is a hardware cryptographic accelerator that support
Le 22/10/2014 11:00, Arnd Bergmann a écrit :
> On Sunday 19 October 2014 16:16:22 LABBE Corentin wrote:
>> Add support for the Security System included in Allwinner SoC A20.
>> The Security System is a hardware cryptographic accelerator that support
>> AES/MD5/SHA1/DES/3DES/PRNG algorithms.
>>
>>
+break;
>> +case 192 / 8:
>> +op->keymode = SS_AES_192BITS;
>> +break;
>> +case 256 / 8:
>> +op->keymode = SS_AES_256BITS;
>> +break;
>> +default:
>> +dev_e
Le 15/11/2014 00:59, Andrew Bresticker a écrit :
> Hi James,
>
>> +
>> +struct img_hash_drv {
>> + struct list_head dev_list;
>> + spinlock_t lock;
>> +};
>> +
>> +static struct img_hash_drv img_hash = {
>> + .dev_list = LIST_HEAD_INIT(img_hash.dev_list),
>> + .lock = __SPI
Le 17/11/2014 18:06, Terence Eden a écrit :
> From: edent
>
> Signed-off-by: edent
> ---
> crypto/ahash.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/crypto/ahash.c b/crypto/ahash.c
> index f6a36a5..ffbcda3 100644
> --- a/crypto/ahash.c
> +++ b/crypto/ahash.c
> @@
hello
I am trying to add the CTR (counter) block cipher mode for AES on my Security
System driver.
When testing with the tcrypt module I got the following result:
[ 1256.986989] alg: skcipher: Test 1 failed on encryption for ctr-aes-sunxi-ss
[ 1256.987004] : 87 4d 61 91 b6 20 e3 26 1b ef
Le 30/03/2015 20:08, Markus Stockhausen a écrit :
>> Von: linux-crypto-ow...@vger.kernel.org
>> [linux-crypto-ow...@vger.kernel.org]" im Auftrag von "Corentin
>> LABBE [clabbe.montj...@gmail.com]
>> Gesendet: Montag, 30. März 2015 19:59
>> An: linu
On 04/01/15 04:06, kevin.z.m...@gmail.com wrote:
> Dear All,
>
>
> About the SS module, there is some detail information.
> There is some issues on the SS hardware module, the issues make the some
> AES/DES/3DS algorithm be not available.
> 1. The byte order of the counter is wrong, make the resu
formation.
Regards
>
> Best Regards,
>
> kevin.z.m...
Le 26/03/2015 19:31, Boris Brezillon a écrit :
> Hi Corentin,
>
> Here is a quick review, there surely are a lot of other things I didn't
> spot.
>
> On Mon, 16 Mar 2015 20:01:22 +0100
> LABBE Corentin wrote:
>
>> Add support for the Security System included in Allwinner SoC A20.
>> The Securit
From: LABBE Corentin
The Security System have a PRNG.
This patch add support for it as an hwrng.
Signed-off-by: Corentin Labbe
---
drivers/crypto/Kconfig | 8
drivers/crypto/sunxi-ss/Makefile | 1 +
drivers/crypto/sunxi-ss/sun4i-ss-core.c | 14
Since SID's content is constant over reboot, it must not be used
as source of randomness.
This patch remove the use of SID content as source of randomness.
Signed-off-by: Corentin Labbe
---
drivers/nvmem/sunxi_sid.c | 21 -
1 file changed, 21 deletions(-)
diff --
On Tue, Oct 25, 2016 at 03:26:48PM +0200, Maxime Ripard wrote:
> On Tue, Oct 25, 2016 at 07:38:55AM +0200, LABBE Corentin wrote:
> > On Mon, Oct 24, 2016 at 10:10:20PM +0200, Maxime Ripard wrote:
> > > On Sat, Oct 22, 2016 at 03:53:28PM +0200, Corentin Labbe wrote:
> > &g
On Tue, Oct 18, 2016 at 09:39:17PM +0530, PrasannaKumar Muralidharan wrote:
> Hi Corentin,
>
> I have a few minor comments.
>
> On 18 October 2016 at 18:04, Corentin Labbe wrote:
> > From: LABBE Corentin
> >
> > The Security System have a PRNG.
> > Th
On Tue, Oct 18, 2016 at 04:24:22PM +0200, Stephan Mueller wrote:
> Am Dienstag, 18. Oktober 2016, 14:34:27 CEST schrieb Corentin Labbe:
>
> Hi Corentin,
>
> > diff --git a/drivers/crypto/sunxi-ss/sun4i-ss-hwrng.c
> > b/drivers/crypto/sunxi-ss/sun4i-ss-hwrng.c new fi
ainer.pl on drivers/char/hw_random/, does not give his
address also.
My V2 patch will have them in CC/TO.
> On Tue, Oct 18, 2016 at 8:34 AM, Corentin Labbe
> wrote:
>
> > From: LABBE Corentin
> >
> > The Security System have a PRNG.
> > This patch add support
Hello
I have some minor comment inline
On Fri, Dec 02, 2016 at 11:26:44AM +0800, Ryder Lee wrote:
> This adds support for the MediaTek hardware accelerator on
> mt7623/mt2701/mt8521p SoC.
>
> This driver currently implement:
> - SHA1 and SHA2 family(HMAC) hash alogrithms.
> - AES block cipher in
processed.
> + */
> +struct mtk_desc {
> + u32 hdr;
> + u32 buf;
> + u32 ct;
> + u32 ct_hdr;
> + u32 tag;
> + u32 tfm;
> + u32 bound[2];
> +};
Do you have tested this descriptor with BE/LE kernel ?
Regards
Corentin Labbe
--
To unsubscribe
From: LABBE Corentin
The Security System have a PRNG.
This patch add support for it as an hwrng.
Signed-off-by: Corentin Labbe
---
Changes since v1:
- Replaced all spin_lock_bh by simple spin_lock
- Removed handling of size not modulo 4 which will never happen
- Added
On Mon, Dec 05, 2016 at 08:37:05PM +0800, Herbert Xu wrote:
> On Mon, Dec 05, 2016 at 11:48:42AM +0100, Corentin Labbe wrote:
> > From: LABBE Corentin
> >
> > The Security System have a PRNG.
> > This patch add support for it as an hwrng.
> >
> > Signed-of
On Wed, Dec 07, 2016 at 08:09:00PM +0800, Herbert Xu wrote:
> On Mon, Dec 05, 2016 at 01:57:38PM +0100, Corentin Labbe wrote:
> >
> > So how to expose PRNG to user space ? or more generally how to "use" a PRNG
> > ?
>
> We do have the algif_rng interface.
&g
On Thu, Dec 08, 2016 at 05:06:18PM +0800, Herbert Xu wrote:
> On Wed, Dec 07, 2016 at 01:51:27PM +0100, Corentin Labbe wrote:
> >
> > So I must expose it as a crypto_rng ?
>
> If it is to be exposed at all then algif_rng would be the best
> place.
>
I have badly sai
This patch fix the checkpatch warning "Please don't use multiple blank lines"
Signed-off-by: Corentin Labbe
---
drivers/char/hw_random/core.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/char/hw_random/core.c b/drivers/char/hw_random/core.c
index d2d2c89..00cbb
This patch fix the checkpatch warning about asm/uaccess.h.
In the same time, we sort the headers in alphabetical order.
Signed-off-by: Corentin Labbe
---
drivers/char/hw_random/core.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/char/hw_random
This patch move the define for hwrng's miscdev minor number to
include/linux/miscdevice.h.
It's better that all minor number are in the same place.
Rename it to HWRNG_MINOR (from RNG_MISCDEV_MINOR) in he process since
no other miscdev define have MISCDEV in their name.
Signed-off-by
linux/fs.h and linux/sched.h are useless for hw_random/core.c.
This patch remove them.
Signed-off-by: Corentin Labbe
---
drivers/char/hw_random/core.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/char/hw_random/core.c b/drivers/char/hw_random/core.c
index 5c654b5..85c9ab3 100644
checkpatch have lot of complaint about header.
Furthermore, the header have some offtopic/useless information.
This patch rewrite a proper header.
Signed-off-by: Corentin Labbe
---
drivers/char/hw_random/core.c | 38 +-
1 file changed, 9 insertions(+), 29
This patch remove the unused PFX macro.
Signed-off-by: Corentin Labbe
---
drivers/char/hw_random/core.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/char/hw_random/core.c b/drivers/char/hw_random/core.c
index 1e1e385..5c654b5 100644
--- a/drivers/char/hw_random/core.c
+++ b
This patch fix the checkpatch warning "Comparison to NULL could be written
"!ptr"
Signed-off-by: Corentin Labbe
---
drivers/char/hw_random/core.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/char/hw_random/core.c b/drivers/char/hw_random/core.
On Fri, Dec 09, 2016 at 03:21:39PM +0100, Corentin Labbe wrote:
> linux/fs.h and linux/sched.h are useless for hw_random/core.c.
> This patch remove them.
>
> Signed-off-by: Corentin Labbe
> ---
> drivers/char/hw_random/core.c | 2 --
> 1 file changed, 2 deletions(-)
>
irst)
> +
> + pr_info("ThunderX-ZIP driver is removed successfully\n");
> +}
> +
> +module_init(zip_init_module);
> +module_exit(zip_cleanup_module);
Why not using module_pci_driver ?
[...]
> +/**
> + * enum zip_comp_e - ZIP Completion Enumeration, enumerates the values of
> + * ZIP_ZRES_S[COMPCODE].
> + */
> +enum zip_comp_e {
> + ZIP_COMP_E_BADCODE = 0x7,
> + ZIP_COMP_E_BADCODE2 = 0x8,
> + ZIP_COMP_E_DTRUNC = 0x2,
> + ZIP_COMP_E_FATAL = 0xb,
> + ZIP_COMP_E_ITRUNC = 0x4,
> + ZIP_COMP_E_NLEN = 0x6,
> + ZIP_COMP_E_NOTDONE = 0x0,
> + ZIP_COMP_E_PARITY = 0xa,
> + ZIP_COMP_E_RBLOCK = 0x5,
> + ZIP_COMP_E_STOP = 0x3,
> + ZIP_COMP_E_SUCCESS = 0x1,
> + ZIP_COMP_E_ZERO_LEN = 0x9,
> + ZIP_COMP_E_ENUM_LAST = 0xc,
Why not using already declared define ? ZIP_COMP_E_BADCODE = ZIP_BADCODE
Regards
Corentin Labbe
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To unsubscribe from this list: send the line "unsubscribe linux-crypto" in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
On Thu, Dec 08, 2016 at 05:06:18PM +0800, Herbert Xu wrote:
> On Wed, Dec 07, 2016 at 01:51:27PM +0100, Corentin Labbe wrote:
> >
> > So I must expose it as a crypto_rng ?
>
> If it is to be exposed at all then algif_rng would be the best
> place.
>
> > Could
THe major content of drivers/crypto/Makefile is sorted, only recent
addition break this sort.
This patch bring back this alphabetical sorting.
Signed-off-by: Corentin Labbe
---
drivers/crypto/Makefile | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers
This patch move the define for hwrng's miscdev minor number to
include/linux/miscdevice.h.
It's better that all minor number are in the same place.
Rename it to HWRNG_MINOR (from RNG_MISCDEV_MINOR) in he process since
no other miscdev define have MISCDEV in their name.
Signed-off-by
This patch fix the checkpatch warning "Please don't use multiple blank lines"
Signed-off-by: Corentin Labbe
---
drivers/char/hw_random/core.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/char/hw_random/core.c b/drivers/char/hw_random/core.c
index d2d2c89..00cbb
This patch remove the unused PFX macro.
Signed-off-by: Corentin Labbe
---
drivers/char/hw_random/core.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/char/hw_random/core.c b/drivers/char/hw_random/core.c
index 1e1e385..5c654b5 100644
--- a/drivers/char/hw_random/core.c
+++ b
This patch fix the checkpatch warning about asm/uaccess.h.
In the same time, we sort the headers in alphabetical order.
Signed-off-by: Corentin Labbe
---
drivers/char/hw_random/core.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/char/hw_random
linux/sched.h is useless for hw_random/core.c.
This patch remove it.
Signed-off-by: Corentin Labbe
---
Change since v1:
- linux/fs.h was needed, keep it
drivers/char/hw_random/core.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/char/hw_random/core.c b/drivers/char/hw_random
checkpatch have lot of complaint about header.
Furthermore, the header have some offtopic/useless information.
This patch rewrite a proper header.
Signed-off-by: Corentin Labbe
---
drivers/char/hw_random/core.c | 38 +-
1 file changed, 9 insertions(+), 29
This patch fix the checkpatch warning "Comparison to NULL could be written
"!ptr"
Signed-off-by: Corentin Labbe
---
drivers/char/hw_random/core.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/char/hw_random/core.c b/drivers/char/hw_random/core.
On Tue, Dec 13, 2016 at 08:53:54PM +0530, PrasannaKumar Muralidharan wrote:
> > What do you think about those two solutions ?
>
> I prefer the second solution's idea of using two files (/dev/hwrng and
> /dev/hwprng). Upon having a quick glance it looks like (based on
> current_rng == prng check) t
On Wed, Dec 14, 2016 at 01:05:51PM +0800, Herbert Xu wrote:
> On Tue, Dec 13, 2016 at 03:10:59PM +0100, Corentin Labbe wrote:
> >
> > I have found two solutions:
>
> No we already have algif_rng so let's not confuse things even
> further by making hwrng take PR
bfin_crc.h driver does not use any miscdevice, so this patch remove this
unnecessary inclusion.
Signed-off-by: Corentin Labbe
---
drivers/crypto/bfin_crc.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/crypto/bfin_crc.h b/drivers/crypto/bfin_crc.h
index 75cef4d..786ef74 100644
bfin_crc.c print some u32 as unsigned long ans so gcc complains
about it.
This patch remove the long print qualifier.
Signed-off-by: Corentin Labbe
---
drivers/crypto/bfin_crc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/crypto/bfin_crc.c b/drivers/crypto
e
> config space\n");
> + return -ENODEV;
> + }
> +
> + cpt->num_vf_en = num_vfs; /* User requested VFs */
> + pci_read_config_word(pdev, (pos + PCI_SRIOV_TOTAL_VF), &total_vf_cnt);
> + if (total_vf_cnt < cpt->num_vf_e
you have lots of that in all your alloc
[...]
> +
> + ret = send_cpt_command(cptvf, &cptinst, queue);
> + spin_unlock_bh(&pqueue->lock);
> + if (unlikely(ret)) {
> + spin_unlock_bh(&pqueue->lock);
Double unlock
[...]
> diff --git a/dr
=-22
But with the same parameters (msg, n, e) openssl give me exactly this output.
So what I miss for made it work ?
In which format testmgr expect the output data ?
Thanks
Regards
Corentin Labbe
On Tue, Feb 28, 2017 at 05:08:35PM +0100, Stephan Müller wrote:
> Am Dienstag, 28. Februar 2017, 16:59:53 CET schrieb Corentin Labbe:
>
> Hi Corentin,
>
> > hello
> >
> > I work on the sun8i-ce crypto accelerator and I have some problem with the
> > RSA par
On Tue, Feb 28, 2017 at 11:35:04PM +0100, Stephan Müller wrote:
> Am Dienstag, 28. Februar 2017, 17:45:53 CET schrieb Corentin Labbe:
>
> Hi Corentin,
>
> > On Tue, Feb 28, 2017 at 05:08:35PM +0100, Stephan Müller wrote:
> > > Am Dienstag, 28. Februar 2017, 16:59:53
On Wed, Mar 01, 2017 at 04:07:17PM +0100, Stephan Müller wrote:
> Am Mittwoch, 1. März 2017, 13:04:14 CET schrieb Corentin Labbe:
>
> Hi Corentin,
>
> >
> > I got the following:
> >
> > [1.086228] alg: akcipher: encrypt test failed. Invalid output
>
On Fri, Jul 28, 2017 at 09:52:57PM +0800, Herbert Xu wrote:
> On Fri, Jul 14, 2017 at 01:15:36PM +0200, Corentin Labbe wrote:
> > On Fri, Jun 23, 2017 at 02:48:37PM +0800, Herbert Xu wrote:
> > > On Mon, Jun 19, 2017 at 09:55:24AM +0200, Corentin Labbe wrote:
> > > &g
On Fri, Jul 28, 2017 at 05:01:19PM +0200, Corentin Labbe wrote:
> On Fri, Jul 28, 2017 at 09:52:57PM +0800, Herbert Xu wrote:
> > On Fri, Jul 14, 2017 at 01:15:36PM +0200, Corentin Labbe wrote:
> > > On Fri, Jun 23, 2017 at 02:48:37PM +0800, Herbert Xu wrote:
> > > >
Two return case misses to call release_firmware() and so leak some
memory.
This patch create a fw_release label (and so a common error path)
and use it on all return case.
Detected by CoverityScan, CID#1416422 ("Resource Leak")
Signed-off-by: Corentin Labbe
---
drivers/crypto/
struct *dev in include
- Added missing mutex_unlock in crypto_engine_start()
Corentin Labbe (3):
crypto: skcipher - export crypto_skcipher_type2
crypto: engine - find request type with cra_type
crypto: engine - Permit to enqueue skcipher request
crypto/crypto_engine.c | 133
The crypto engine could actually only enqueue hash and ablkcipher request.
This patch permit it to enqueue skcipher requets by adding all necessary
functions.
Signed-off-by: Corentin Labbe
---
crypto/crypto_engine.c | 114
include/crypto
The current method for finding request type is based on crypto_tfm_alg_type.
But in case of skcipher, it is the same than ablkcipher.
Using cra_type for this work permits to make the distinction between the two.
Signed-off-by: Corentin Labbe
---
crypto/crypto_engine.c | 19
This patch export crypto_skcipher_type2 like others cra_type
Signed-off-by: Corentin Labbe
---
crypto/skcipher.c | 3 ++-
include/crypto/algapi.h | 1 +
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/crypto/skcipher.c b/crypto/skcipher.c
index 4faa0fd53b0c..c6523826890f
ipher which is obsolete
and you need to convert to skcipher.
regards
Corentin Labbe
On Fri, Aug 18, 2017 at 04:28:37PM +0800, Herbert Xu wrote:
> On Mon, Aug 14, 2017 at 03:17:24PM +0200, Corentin Labbe wrote:
> > The current method for finding request type is based on crypto_tfm_alg_type.
> >
> > But in case of skcipher, it is the same than ablkcipher.
&
The crypto engine could actually only enqueue hash and ablkcipher request.
This patch permit it to enqueue skcipher requests by adding all necessary
functions.
Signed-off-by: Corentin Labbe
---
crypto/crypto_engine.c | 120
include/crypto
finding request type according to its cra_type
Changes since v1
- Aligned to column struct *dev in include
- Added missing mutex_unlock in crypto_engine_start()
Corentin Labbe (1):
crypto: engine - Permit to enqueue skcipher request
crypto/crypto_engine.c | 120
This patch replace GCM IV size value by their constant name.
Signed-off-by: Corentin Labbe
---
drivers/crypto/nx/nx-aes-gcm.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto/nx/nx-aes-gcm.c b/drivers/crypto/nx/nx-aes-gcm.c
index abd465f479c4
This patch replace GCM IV size value by their constant name.
Signed-off-by: Corentin Labbe
---
drivers/crypto/mediatek/mtk-aes.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/mediatek/mtk-aes.c
b/drivers/crypto/mediatek/mtk-aes.c
index 9e845e866dec
This patch replace GCM IV size value by their constant name.
Signed-off-by: Corentin Labbe
---
drivers/crypto/chelsio/chcr_algo.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto/chelsio/chcr_algo.c
b/drivers/crypto/chelsio/chcr_algo.c
index
This patch replace GCM IV size value by their constant name.
Signed-off-by: Corentin Labbe
---
drivers/crypto/omap-aes-gcm.c | 7 ---
drivers/crypto/omap-aes.c | 5 +++--
2 files changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/crypto/omap-aes-gcm.c b/drivers/crypto/omap
This patch replace GCM IV size value by their constant name.
Signed-off-by: Corentin Labbe
---
arch/x86/crypto/aesni-intel_glue.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/x86/crypto/aesni-intel_glue.c
b/arch/x86/crypto/aesni-intel_glue.c
index
This patch replace GCM IV size value by their constant name.
Signed-off-by: Corentin Labbe
---
crypto/gcm.c | 23 ---
1 file changed, 12 insertions(+), 11 deletions(-)
diff --git a/crypto/gcm.c b/crypto/gcm.c
index 3841b5eafa7e..80cf6cfe082b 100644
--- a/crypto/gcm.c
+++ b
This patch replace GCM IV size value by their constant name.
Signed-off-by: Corentin Labbe
---
drivers/crypto/atmel-aes.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/atmel-aes.c b/drivers/crypto/atmel-aes.c
index 29e20c37f3a6..903fd43f23a5 100644
This patch replace GCM IV size value by their constant name.
Signed-off-by: Corentin Labbe
---
drivers/crypto/bcm/cipher.c | 8
drivers/crypto/bcm/cipher.h | 3 +--
2 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/drivers/crypto/bcm/cipher.c b/drivers/crypto/bcm/cipher.c
This patch replace GCM IV size value by their constant name.
Signed-off-by: Corentin Labbe
---
drivers/crypto/caam/caamalg.c | 10 +-
drivers/crypto/caam/compat.h | 1 +
2 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/crypto/caam/caamalg.c b/drivers/crypto/caam
Many GCM users use directly GCM IV size instead of using some constant.
This patch add all IV size constant used by GCM.
Signed-off-by: Corentin Labbe
---
include/crypto/gcm.h | 8
1 file changed, 8 insertions(+)
create mode 100644 include/crypto/gcm.h
diff --git a/include/crypto
This patch replace GCM IV size value by their constant name.
Signed-off-by: Corentin Labbe
---
drivers/crypto/ccp/ccp-crypto-aes-galois.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/crypto/ccp/ccp-crypto-aes-galois.c
b/drivers/crypto/ccp/ccp-crypto-aes
Many GCM users use directly GCM IV size instead of using some constant.
This patch add all IV size constant used by GCM and convert drivers for using
them..
Corentin Labbe (11):
crypto: gcm - add GCM iv size constant
crypto: caam - Use GCM IV size constant
crypto: ccp - Use GCM IV size
The usage of of_device_get_match_data reduce the code size a bit.
Furthermore, it prevents an improbable dereference when
of_match_device() return NULL.
Signed-off-by: Corentin Labbe
---
drivers/crypto/stm32/stm32-hash.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a
The usage of of_device_get_match_data reduce the code size a bit.
Furthermore, it prevents an improbable dereference when
of_match_device() return NULL.
Signed-off-by: Corentin Labbe
---
drivers/crypto/omap-aes.c | 7 ++-
drivers/crypto/omap-des.c | 7 ++-
drivers/crypto/omap-sham.c
The usage of of_device_get_match_data reduce the code size a bit.
Furthermore, it prevents an improbable dereference when
of_match_device() return NULL.
Signed-off-by: Corentin Labbe
---
drivers/crypto/bcm/cipher.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a
This patch fix the following build warning:
drivers/block/cryptoloop.c:46:8: warning: variable 'cipher' set but not used
[-Wunused-but-set-variable]
Signed-off-by: Corentin Labbe
---
drivers/block/cryptoloop.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/block/cryp
Hello
I have some minor comment below
On Thu, Oct 19, 2017 at 11:03:59AM +0200, Fabien Dessenne wrote:
> This module registers block cipher algorithms that make use of the
> STMicroelectronics STM32 crypto "CRYP1" hardware.
> The following algorithms are supported:
> - aes: ecb, cbc, ctr
> - des:
update? (I had to remove the AEAD part of this new driver
> since it depends on that pending update)
No plan, I do not like the Herbert proposal, so it is a bit hard to progress on
it.
>
> BR
>
> Fabien
>
>
> On 19/10/17 12:34, Corentin Labbe wrote:
> > Hello
>
On Thu, Oct 19, 2017 at 05:10:30PM +0200, Fabien Dessenne wrote:
> This module registers block cipher algorithms that make use of the
> STMicroelectronics STM32 crypto "CRYP1" hardware.
> The following algorithms are supported:
> - aes: ecb, cbc, ctr
> - des: ecb, cbc
> - tdes: ecb, cbc
>
> Signed
When a cipher fail to register in aes_init(), the error path go thought
aes_exit() then crypto_unregister_skciphers().
Since aes_exit calls also crypto_unregister_skcipher, this trigger a
refcount_t: underflow; use-after-free.
Signed-off-by: Corentin Labbe
---
arch/arm64/crypto/aes-glue.c | 5
When a cipher fails to register in aes_init(), the error path goes thought
aes_exit() then crypto_unregister_skciphers().
Since aes_exit calls also crypto_unregister_skcipher, this triggers a
refcount_t: underflow; use-after-free.
Signed-off-by: Corentin Labbe
---
Changes since v1:
- Instead of
driver.
Regards
[1] https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1474434.html
Corentin Labbe (4):
crypto: engine - Permit to enqueue all async requests
crypto: omap: convert to new crypto engine API
crypto: virtio: convert to new crypto engine API
crypto: stm32: convert to
This patch convert the driver to the new crypto engine API.
Signed-off-by: Corentin Labbe
---
drivers/crypto/virtio/virtio_crypto_algs.c | 15 ++-
drivers/crypto/virtio/virtio_crypto_common.h | 2 +-
drivers/crypto/virtio/virtio_crypto_core.c | 3 ---
3 files changed, 11
This patch convert the driver to the new crypto engine API.
Signed-off-by: Corentin Labbe
---
drivers/crypto/stm32/stm32-hash.c | 22 +++---
1 file changed, 15 insertions(+), 7 deletions(-)
diff --git a/drivers/crypto/stm32/stm32-hash.c
b/drivers/crypto/stm32/stm32-hash.c
This patch convert the driver to the new crypto engine API.
Signed-off-by: Corentin Labbe
---
drivers/crypto/omap-aes.c | 21 +++--
drivers/crypto/omap-aes.h | 3 +++
drivers/crypto/omap-des.c | 24 ++--
3 files changed, 36 insertions(+), 12 deletions
The crypto engine could actually only enqueue hash and ablkcipher request.
This patch permit it to enqueue any type of crypto_async_request.
Signed-off-by: Corentin Labbe
---
crypto/crypto_engine.c | 188 +++-
include/crypto/engine.h | 46
s);
Let's replace sti_dt_ids with stm32_dt_ids which is just declared
before.
Signed-off-by: Corentin Labbe
---
drivers/crypto/stm32/stm32-cryp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/stm32/stm32-cryp.c
b/drivers/crypto/stm32/stm32-cryp.c
ind
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