Re: [PATCH v2 5/8] crypto: ccp: Use the stack for small SEV command buffers

2021-04-17 Thread Paolo Bonzini
On 07/04/21 00:49, Sean Christopherson wrote: For commands with small input/output buffers, use the local stack to "allocate" the structures used to communicate with the PSP. Now that __sev_do_cmd_locked() gracefully handles vmalloc'd buffers, there's no reason to avoid using the stack, e.g. CO

Re: [PATCH v2 7/8] crypto: ccp: Use the stack and common buffer for INIT command

2021-04-17 Thread Paolo Bonzini
On 07/04/21 07:20, Christophe Leroy wrote: +    struct sev_data_init data; struct sev_data_init data = {0, 0, 0, 0}; Having to count the number of items is suboptimal. The alternative could be {} (which however is technically not standard C), {0} (a bit mysterious, but it works) and memse

Re: [PATCH v2 8/8] KVM: SVM: Allocate SEV command structures on local stack

2021-04-17 Thread Paolo Bonzini
On 07/04/21 19:34, Borislav Petkov wrote: On Wed, Apr 07, 2021 at 05:05:07PM +, Sean Christopherson wrote: I used memset() to defer initialization until after the various sanity checks, I'd actually vote for that too - I don't like doing stuff which is not going to be used. I.e., don't cha

Re: [PATCH v2 0/8] ccp: KVM: SVM: Use stack for SEV command buffers

2021-04-17 Thread Paolo Bonzini
On 07/04/21 00:49, Sean Christopherson wrote: This series teaches __sev_do_cmd_locked() to gracefully handle vmalloc'd command buffers by copying _all_ incoming data pointers to an internal buffer before sending the command to the PSP. The SEV driver and KVM are then converted to use the stack f

[Patch v2 0/7] Add support for AEAD algorithms in Qualcomm Crypto Engine driver

2021-04-17 Thread Thara Gopinath
Enable support for AEAD algorithms in Qualcomm CE driver. The first three patches in this series are cleanups and add a few missing pieces required to add support for AEAD algorithms. Patch 4 introduces supported AEAD transformations on Qualcomm CE. Patches 5 and 6 implements the h/w infrastruct

[Patch v2 1/7] crypto: qce: common: Add MAC failed error checking

2021-04-17 Thread Thara Gopinath
MAC_FAILED gets set in the status register if authenthication fails for ccm algorithms(during decryption). Add support to catch and flag this error. Signed-off-by: Thara Gopinath --- v1->v2: - Split the error checking for -ENXIO and -EBADMSG into if-else clause so that the code

[Patch v2 2/7] crypto: qce: common: Make result dump optional

2021-04-17 Thread Thara Gopinath
Qualcomm crypto engine allows for IV registers and status register to be concatenated to the output. This option is enabled by setting the RESULTS_DUMP field in GOPROC register. This is useful for most of the algorithms to either retrieve status of operation or in case of authentication algorithms

[Patch v2 5/7] crypto: qce: common: Clean up qce_auth_cfg

2021-04-17 Thread Thara Gopinath
Remove various redundant checks in qce_auth_cfg. Also allow qce_auth_cfg to take auth_size as a parameter which is a required setting for ccm(aes) algorithms Signed-off-by: Thara Gopinath --- drivers/crypto/qce/common.c | 21 + 1 file changed, 9 insertions(+), 12 deletions(-)

[Patch v2 4/7] crypto: qce: Add support for AEAD algorithms

2021-04-17 Thread Thara Gopinath
Introduce support to enable following algorithms in Qualcomm Crypto Engine. - authenc(hmac(sha1),cbc(des)) - authenc(hmac(sha1),cbc(des3_ede)) - authenc(hmac(sha256),cbc(des)) - authenc(hmac(sha256),cbc(des3_ede)) - authenc(hmac(sha256),cbc(aes)) - ccm(aes) - rfc4309(ccm(aes)) Signed-off-by: Thar

[Patch v2 6/7] crypto: qce: common: Add support for AEAD algorithms

2021-04-17 Thread Thara Gopinath
Add register programming sequence for enabling AEAD algorithms on the Qualcomm crypto engine. Signed-off-by: Thara Gopinath --- v1->v2: - Minor fixes like removing not needed initializing of variables and using bool values in lieu of 0 and 1 as pointed out by Bjorn. - I

[Patch v2 7/7] crypto: qce: aead: Schedule fallback algorithm

2021-04-17 Thread Thara Gopinath
Qualcomm crypto engine does not handle the following scenarios and will issue an abort. In such cases, pass on the transformation to a fallback algorithm. - DES3 algorithms with all three keys same. - AES192 algorithms. - 0 length messages. Signed-off-by: Thara Gopinath --- v1->v2: - Up

[Patch v2 3/7] crypto: qce: Add mode for rfc4309

2021-04-17 Thread Thara Gopinath
rf4309 is the specification that uses aes ccm algorithms with IPsec security packets. Add a submode to identify rfc4309 ccm(aes) algorithm in the crypto driver. Signed-off-by: Thara Gopinath --- v1->v2: - Moved up the QCE_ENCRYPT AND QCE_DECRYPT bit positions so that addition o

Re: [PATCH 6/7] crypto: qce: common: Add support for AEAD algorithms

2021-04-17 Thread Thara Gopinath
On 4/13/21 7:09 PM, Bjorn Andersson wrote: On Tue 13 Apr 17:44 CDT 2021, Thara Gopinath wrote: [..] Yes, given that you just typecast things as you do it should just work to move the typecast to the qce_cpu_to_be32p_array(). But as I said, this would indicate that what is cpu_to_be32() s

Re: [Patch v2 6/7] crypto: qce: common: Add support for AEAD algorithms

2021-04-17 Thread kernel test robot
submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Thara-Gopinath/Add-support-for-AEAD-algorithms-in-Qualcomm-Crypto-Engine-driver/20210417-212646 base: https://git.kernel.org/pub

[V3 PATCH 00/16] Enable VAS and NX-GZIP support on powerVM

2021-04-17 Thread Haren Myneni
This patch series enables VAS / NX-GZIP on powerVM which allows the user space to do copy/paste with the same existing interface that is available on powerNV. VAS Enablement: - Get all VAS capabilities using H_QUERY_VAS_CAPABILITIES that are available in the hypervisor. These capabilities tell

[V3 PATCH 01/16] powerpc/powernv/vas: Rename register/unregister functions

2021-04-17 Thread Haren Myneni
powerNV and pseries drivers register / unregister to the corresponding VAS code separately. So rename powerNV VAS API register/unregister functions. Signed-off-by: Haren Myneni --- arch/powerpc/include/asm/vas.h | 6 +++--- arch/powerpc/platforms/powernv/vas-api.c | 10 +- d

[PATCH V3 02/16] powerpc/vas: Move VAS API to common book3s platform

2021-04-17 Thread Haren Myneni
Using the same /dev/crypto/nx-gzip interface for both powerNV and pseries. So this patch creates platforms/book3s/ and moves VAS API to that directory. The actual functionality is not changed. Common interface functions such as open, window open ioctl, mmap and close are moved to arch/powerpc/pl

[V3 PATCH 04/16] powerpc/vas: Move update_csb/dump_crb to common book3s platform

2021-04-17 Thread Haren Myneni
NX issues an interrupt when sees fault on user space buffer. The kernel processes the fault by updating CSB. This functionality is same for both powerNV and pseries. So this patch moves these functions to common vas-api.c and the actual functionality is not changed. Signed-off-by: Haren Myneni

[V3 PATCH 03/16] powerpc/vas: Create take/drop task reference functions

2021-04-17 Thread Haren Myneni
Take task reference when each window opens and drops during close. This functionality is needed for powerNV and pseries. So this patch defines the existing code as functions in common book3s platform vas-api.c Signed-off-by: Haren Myneni --- arch/powerpc/include/asm/vas.h | 20 +++

[V3 PATCH 05/16] powerpc/vas: Define and use common vas_window struct

2021-04-17 Thread Haren Myneni

[V3 PATCH 06/16] powerpc/pseries/vas: Define VAS/NXGZIP HCALLs and structs

2021-04-17 Thread Haren Myneni
This patch adds HCALLs and other definitions. Also define structs that are used in VAS implementation on powerVM. Signed-off-by: Haren Myneni --- arch/powerpc/include/asm/hvcall.h| 7 ++ arch/powerpc/include/asm/vas.h | 28 arch/powerpc/platforms/pseries/vas.h | 96

[V3 PATCH 07/16] powerpc/vas: Define QoS credit flag to allocate window

2021-04-17 Thread Haren Myneni
pHyp introduces two different type of credits: Default and Quality of service (QoS). The total number of default credits available on each LPAR depends on CPU resources configured. But these credits can be shared or over-committed across LPARs in shared mode which can result in paste command fai

[V3 PATCH 08/16] powerpc/pseries/VAS: Implement allocate/modify/deallocate HCALLS

2021-04-17 Thread Haren Myneni
This patch adds the following HCALLs which are used to allocate, modify and deallocate VAS windows. H_ALLOCATE_VAS_WINDOW: Allocate VAS window H_DEALLOCATE_VAS_WINDOW: Close VAS window H_MODIFY_VAS_WINDOW: Setup window before using Also adds phyp call (H_QUERY_VAS_CAPABILITIES) to get all VAS c

[V3 PATCH 09/16] powerpc/pseries/vas: Implement to get all capabilities

2021-04-17 Thread Haren Myneni
pHyp provides various VAS capabilities such as GZIP default and QoS capabilities which are used to determine total number of credits available in LPAR, maximum window credits, maximum LPAR credits, whether usermode copy/paste is supported, and etc. So first retrieve overall vas capabilities usin

[V3 PATCH 10/16] powerpc/pseries/vas: Integrate API with open/close windows

2021-04-17 Thread Haren Myneni
This patch adds VAS window allocatioa/close with the corresponding HCALLs. Also changes to integrate with the existing user space VAS API and provide register/unregister functions to NX pseries driver. The driver register function is used to create the user space interface (/dev/crypto/nx-gzip)

[V3 PATCH 11/16] powerpc/pseries/vas: Setup IRQ and fault handling

2021-04-17 Thread Haren Myneni
When NX sees a fault on the user space buffer, generates a fault interrupt and pHyp forwards that interrupt to OS. Then the kernel makes H_GET_NX_FAULT HCALL to retrieve the fault CRB information. This patch adds changes to setup IRQ per each window and handles fault by updating CSB. Signed-off

[V3 PATCH 12/16] powerpc/pseries/vas: sysfs interface to export capabilities

2021-04-17 Thread Haren Myneni
pHyp provides GZIP default and GZIP QoS capabilities which gives the total number of credits are available in LPAR. This patch creates sysfs entries and exports LPAR credits, the currently used and the available credits for each feature. /sys/kernel/vas/VasCaps/VDefGzip: (default GZIP capabiliti

[V3 PATCH 13/16] crypto/nx: Rename nx-842-pseries file name to nx-common-pseries

2021-04-17 Thread Haren Myneni
Rename nx-842-pseries.c to nx-common-pseries.c to add code for new GZIP compression type. The actual functionality is not changed in this patch. Signed-off-by: Haren Myneni --- drivers/crypto/nx/Makefile | 2 +- drivers/crypto/nx/{nx-842-pseries.c => nx-common-

[V3 PATCH 14/16] crypto/nx: Register and unregister VAS interface

2021-04-17 Thread Haren Myneni
Changes to create /dev/crypto/nx-gzip interface with VAS register and to remove this interface with VAS unregister. Signed-off-by: Haren Myneni --- drivers/crypto/nx/Kconfig | 1 + drivers/crypto/nx/nx-common-pseries.c | 9 + 2 files changed, 10 insertions(+) diff --git a/

[V3 PATCH 15/16] crypto/nx: Get NX capabilities for GZIP coprocessor type

2021-04-17 Thread Haren Myneni
phyp provides NX capabilities which gives recommended minimum compression / decompression length and maximum request buffer size in bytes. Changes to get NX overall capabilities which points to the specific features phyp supports. Then retrieve NXGZIP specific capabilities. Signed-off-by: Haren

[V3 PATCH 16/16] crypto/nx: Add sysfs interface to export NX capabilities

2021-04-17 Thread Haren Myneni
Changes to export the following NXGZIP capabilities through sysfs: /sys/devices/vio/ibm,compression-v1/NxGzCaps: min_compress_len /*Recommended minimum compress length in bytes*/ min_decompress_len /*Recommended minimum decompress length in bytes*/ req_max_processed_len /* Maximum number of byt

[PATCH] crypto: camellia: drop duplicate "depends on CRYPTO"

2021-04-17 Thread Randy Dunlap
All 5 CAMELLIA crypto driver Kconfig symbols have a duplicate "depends on CRYPTO" line but they are inside an "if CRYPTO"/"endif # if CRYPTO" block, so drop the duplicate "depends" lines. These 5 symbols still depend on CRYPTO. Fixes: 584fffc8b196 ("[CRYPTO] kconfig: Ordering cleanup") Fixes: 0b9