Hi,
On Fri, Oct 11, 2019 at 01:51:04PM +0200, Jiri Slaby wrote:
> These are all functions which are invoked from elsewhere, so annotate
> them as global using the new SYM_FUNC_START. And their ENDPROC's by
> SYM_FUNC_END.
>
> And make sure ENTRY/ENDPROC is not defined on X86_64, given these were
On Sat, Oct 12, 2019 at 01:18:06PM -0700, Eric Biggers wrote:
> This series converts the glue code for the S390 CPACF implementations of
> AES, DES, and 3DES modes from the deprecated "blkcipher" API to the
> "skcipher" API. This is needed in order for the blkcipher API to be
> removed.
>
> I've
Register qm to uacce framework for user crypto driver
Signed-off-by: Zhangfei Gao
Signed-off-by: Zhou Wang
---
drivers/crypto/hisilicon/qm.c | 254 ++--
drivers/crypto/hisilicon/qm.h | 13 +-
drivers/crypto/hisilicon/zip/zip_main.c | 39 ++---
i
From: Kenneth Lee
Uacce (Unified/User-space-access-intended Accelerator Framework) targets to
provide Shared Virtual Addressing (SVA) between accelerators and processes.
So accelerator can access any data structure of the main cpu.
This differs from the data sharing between cpu and io device, whi
From: Kenneth Lee
Uacce (Unified/User-space-access-intended Accelerator Framework) is
a kernel module targets to provide Shared Virtual Addressing (SVA)
between the accelerator and process.
This patch add document to explain how it works.
Signed-off-by: Kenneth Lee
Signed-off-by: Zaibo Xu
Sig
Uacce (Unified/User-space-access-intended Accelerator Framework) targets to
provide Shared Virtual Addressing (SVA) between accelerators and processes.
So accelerator can access any data structure of the main cpu.
This differs from the data sharing between cpu and io device, which share
data conten
On Sat, Oct 12, 2019 at 11:20 PM Eric Biggers wrote:
>
> This series converts the glue code for the S390 CPACF implementations of
> AES, DES, and 3DES modes from the deprecated "blkcipher" API to the
> "skcipher" API. This is needed in order for the blkcipher API to be
> removed.
>
> I've compile
Use devm_platform_ioremap_resource() to simplify the code a bit.
This is detected by coccinelle.
Signed-off-by: YueHaibing
---
drivers/char/hw_random/npcm-rng.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/char/hw_random/npcm-rng.c
b/drivers/char/hw_random/npcm
Use devm_platform_ioremap_resource() to simplify the code a bit.
This is detected by coccinelle.
Signed-off-by: YueHaibing
---
drivers/char/hw_random/xgene-rng.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/char/hw_random/xgene-rng.c
b/drivers/char/hw_random/xg
Use devm_platform_ioremap_resource() to simplify the code a bit.
This is detected by coccinelle.
Signed-off-by: YueHaibing
---
drivers/char/hw_random/pic32-rng.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/char/hw_random/pic32-rng.c
b/drivers/char/hw_random/pi
Use devm_platform_ioremap_resource() to simplify the code a bit.
This is detected by coccinelle.
Signed-off-by: YueHaibing
---
drivers/char/hw_random/tx4939-rng.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/char/hw_random/tx4939-rng.c
b/drivers/char/hw_random/
Use devm_platform_ioremap_resource() to simplify the code a bit.
This is detected by coccinelle.
Signed-off-by: YueHaibing
---
drivers/char/hw_random/pasemi-rng.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/char/hw_random/pasemi-rng.c
b/drivers/char/hw_random/
Use devm_platform_ioremap_resource() to simplify the code a bit.
This is detected by coccinelle.
Signed-off-by: YueHaibing
---
drivers/char/hw_random/omap-rng.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/char/hw_random/omap-rng.c
b/drivers/char/hw_random/omap
Use devm_platform_ioremap_resource() to simplify the code a bit.
This is detected by coccinelle.
Signed-off-by: YueHaibing
---
drivers/char/hw_random/atmel-rng.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/char/hw_random/atmel-rng.c
b/drivers/char/hw_random/at
Use devm_platform_ioremap_resource() to simplify the code a bit.
This is detected by coccinelle.
Signed-off-by: YueHaibing
---
drivers/char/hw_random/hisi-rng.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/char/hw_random/hisi-rng.c
b/drivers/char/hw_random/hisi
Use devm_platform_ioremap_resource() to simplify the code a bit.
This is detected by coccinelle.
Signed-off-by: YueHaibing
---
drivers/char/hw_random/ks-sa-rng.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/char/hw_random/ks-sa-rng.c
b/drivers/char/hw_random/ks
Use devm_platform_ioremap_resource() to simplify the code a bit.
This is detected by coccinelle.
Signed-off-by: YueHaibing
---
drivers/char/hw_random/exynos-trng.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/char/hw_random/exynos-trng.c
b/drivers/char/hw_rando
Use devm_platform_ioremap_resource() to simplify the code a bit.
This is detected by coccinelle.
Signed-off-by: YueHaibing
---
drivers/char/hw_random/st-rng.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/char/hw_random/st-rng.c b/drivers/char/hw_random/st-rng.c
devm_platform_ioremap_resource() internally have platform_get_resource()
and devm_ioremap_resource() in it. So instead of calling them separately
use devm_platform_ioremap_resource() directly.
YueHaibing (13):
hwrng: atmel - use devm_platform_ioremap_resource() to simplify code
hwrng: bcm2835
Use devm_platform_ioremap_resource() to simplify the code a bit.
This is detected by coccinelle.
Signed-off-by: YueHaibing
---
drivers/char/hw_random/meson-rng.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/char/hw_random/meson-rng.c
b/drivers/char/hw_random/me
Use devm_platform_ioremap_resource() to simplify the code a bit.
This is detected by coccinelle.
Signed-off-by: YueHaibing
---
drivers/char/hw_random/bcm2835-rng.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/char/hw_random/bcm2835-rng.c
b/drivers/char/hw_rand
On Mon, Oct 14, 2019 at 12:29:57PM -0700, James Bottomley wrote:
> The job of the in-kernel rng is simply to produce a mixed entropy pool
> from which we can draw random numbers. The idea is that quite a few
> attackers have identified the rng as being a weak point in the security
> architecture o
Hi
On 10/16/19 12:46 PM, YueHaibing wrote:
> Use devm_platform_ioremap_resource() to simplify the code a bit.
> This is detected by coccinelle.
>
> Signed-off-by: YueHaibing
> ---
> drivers/char/hw_random/st-rng.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/driver
The safexcel_pci_remove, pcireg_rc and ofreg_rc are
not exported or declared externally so make them static.
This avoids the following sparse warnings:
drivers/crypto/inside-secure/safexcel.c:1760:6: warning: symbol
'safexcel_pci_remove' was not declared. Should it be static?
drivers/crypto/insi
In eip197_write_firmware() the firmware buffer is sent using
writel(be32_to_cpu(),,,) this produces a number of warnings.
Note, should this really be cpu_to_be32() ?
drivers/crypto/inside-secure/safexcel.c:306:17: warning: cast to restricted
__be32
drivers/crypto/inside-secure/safexcel.c:306:17
The driver uses a couple of buffers that seem to
be __be32 or __be64 fields, but declares them as
u32. This means there are a number of warnings
from sparse due to casting to/from __beXXX.
Fix these by changing the types of the buffer
and the associated variables.
drivers/crypto/atmel-aes.c:1023:
On Wed, 2019-10-16 at 14:00 +0300, Jarkko Sakkinen wrote:
> On Mon, Oct 14, 2019 at 12:29:57PM -0700, James Bottomley wrote:
> > The job of the in-kernel rng is simply to produce a mixed entropy
> > pool from which we can draw random numbers. The idea is that quite
> > a few attackers have identif
On Wed, Oct 16, 2019 at 10:01:03AM +0200, Heiko Carstens wrote:
> On Sat, Oct 12, 2019 at 01:18:06PM -0700, Eric Biggers wrote:
> > This series converts the glue code for the S390 CPACF implementations of
> > AES, DES, and 3DES modes from the deprecated "blkcipher" API to the
> > "skcipher" API. T
On Mon, Oct 14, 2019 at 2:19 PM Ard Biesheuvel
wrote:
> Commit 7a7ffe65c8c5 ("crypto: skcipher - Add top-level skcipher interface")
> dated 20 august 2015 introduced the new skcipher API which is supposed to
> replace both blkcipher and ablkcipher. While all consumers of the API have
> been conve
On Mon, Oct 14, 2019 at 2:19 PM Ard Biesheuvel
wrote:
> Commit 7a7ffe65c8c5 ("crypto: skcipher - Add top-level skcipher interface")
> dated 20 august 2015 introduced the new skcipher API which is supposed to
> replace both blkcipher and ablkcipher. While all consumers of the API have
> been conve
Hello
This patch serie adds support for the second version of Allwinner Security
System.
The first generation of the Security System is already handled by the sun4i-ss
driver.
Due to major change, the first driver cannot handle the second one.
This new Security System is present on A80 and A83T
Signed-off-by: Corentin Labbe
---
.../bindings/crypto/allwinner,sun8i-ss.yaml | 64 +++
1 file changed, 64 insertions(+)
create mode 100644
Documentation/devicetree/bindings/crypto/allwinner,sun8i-ss.yaml
diff --git a/Documentation/devicetree/bindings/crypto/allwinner,sun8i-s
The Security System is an hardware cryptographic offloader present
on Allwinner SoCs A80 and A83T.
It is different from the previous sun4i-ss.
This driver supports AES cipher in CBC and ECB mode.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/Kconfig | 28 +
drivers/cry
This patchs the node for sun8i-ss which is availlable on the A80.
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sun9i-a80.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index b9b6fb00be28..d7498a1a158
The Security System is a hardware cryptographic accelerator that support
AES/MD5/SHA1/DES/3DES/PRNG/RSA algorithms.
It could be found on Allwinner SoC A80 and A83T
This patch add it on the Allwinner A83T SoC Device-tree.
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 10 +
On Wed, Oct 16, 2019 at 03:33:41PM +0200, Corentin Labbe wrote:
> Hello
>
> This patch serie adds support for the second version of Allwinner Security
> System.
> The first generation of the Security System is already handled by the
> sun4i-ss driver.
> Due to major change, the first driver canno
Since a second Allwinner crypto driver will be added, it is better to
create a dedicated subdirectory.
Acked-by: Maxime Ripard
Signed-off-by: Corentin Labbe
---
MAINTAINERS | 6 ++
drivers/crypto/Kconfig | 2 ++
drivers/crypto/Makefile | 1 +
drivers/
The Crypto Engine is a hardware cryptographic offloader that supports
many algorithms.
It could be found on most Allwinner SoCs.
This patch enables the Crypto Engine on the Allwinner R40 SoC Device-tree.
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sun8i-r40.dtsi | 9 +
1 file ch
This patch adds documentation for Device-Tree bindings for the
Crypto Engine cryptographic accelerator driver.
Reviewed-by: Rob Herring
Signed-off-by: Corentin Labbe
---
.../bindings/crypto/allwinner,sun8i-ce.yaml | 88 +++
1 file changed, 88 insertions(+)
create mode 100644
The Crypto Engine is a hardware cryptographic accelerator that supports
many algorithms.
This patch enables the Crypto Engine on the Allwinner H6 SoC Device-tree.
Signed-off-by: Corentin Labbe
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 9 +
1 file changed, 9 insertions(+)
diff
Since we have a dedicated Allwinner directory for crypto driver, move
the sun4i-ss driver in it.
Acked-by: Maxime Ripard
Signed-off-by: Corentin Labbe
---
MAINTAINERS | 6 -
drivers/crypto/Kconfig| 26 --
drivers/cry
This patch adds the new Allwinner crypto configs to sunxi_defconfig
Signed-off-by: Corentin Labbe
---
arch/arm/configs/sunxi_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/sunxi_defconfig b/arch/arm/configs/sunxi_defconfig
index df433abfcb02..d0ab8ba7710a 100644
This patch adds the new allwinner crypto configs to ARM64 defconfig
Signed-off-by: Corentin Labbe
---
arch/arm64/configs/defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index c9adae41bac0..c45fb6822e4a 100644
--- a/arch/
The Crypto Engine is a hardware cryptographic accelerator that supports
many algorithms.
It could be found on most Allwinner SoCs.
This patch enables the Crypto Engine on the Allwinner A64 SoC Device-tree.
Signed-off-by: Corentin Labbe
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 9 +
The Crypto Engine is a hardware cryptographic accelerator that supports
many algorithms.
It could be found on most Allwinner SoCs.
This patch enables the Crypto Engine on the Allwinner H3 SoC Device-tree.
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sun8i-h3.dtsi | 9 +
1 file ch
The Crypto Engine is a hardware cryptographic accelerator that supports
many algorithms.
It could be found on most Allwinner SoCs.
This patch enables the Crypto Engine on the Allwinner H5 SoC Device-tree.
Signed-off-by: Corentin Labbe
---
arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 9 +++
Hello
This patch serie adds support for the Allwinner crypto engine.
The Crypto Engine is the third generation of Allwinner cryptogaphic offloader.
The first generation is the Security System already handled by the
sun4i-ss driver.
The second is named also Security System and is present on A80 and
The Crypto Engine is an hardware cryptographic offloader present
on all recent Allwinner SoCs H2+, H3, R40, A64, H5, H6
This driver supports AES cipher in CBC/ECB mode.
Acked-by: Maxime Ripard
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/Kconfig | 27 +
drivers/cryp
On 10/14/2019 3:19 PM, Ard Biesheuvel wrote:
> Commit 7a7ffe65c8c5 ("crypto: skcipher - Add top-level skcipher interface")
> dated 20 august 2015 introduced the new skcipher API which is supposed to
> replace both blkcipher and ablkcipher. While all consumers of the API have
> been converted long a
On Wed, Oct 16, 2019 at 08:34:12AM -0400, James Bottomley wrote:
> reversible ciphers are generally frowned upon in random number
> generation, that's why the krng uses chacha20. In general I think we
> shouldn't try to code our own mixing and instead should get the krng to
> do it for us using wh
YueHaibing writes:
> Use devm_platform_ioremap_resource() to simplify the code a bit.
> This is detected by coccinelle.
>
> Signed-off-by: YueHaibing
Reviewed-by: Kevin Hilman
Iam Mr Taptoka Lornalaboso.
I have a Geniue business transaction of 18.5 Million Us Dollars to do
with You Hence You Co-operate with me I am assured you that within (7)
seven banking working days, this said amount will enter your given
Bank account with immediate alacrity. If you agree to my busin
On 10/16/19 3:46 AM, YueHaibing wrote:
> Use devm_platform_ioremap_resource() to simplify the code a bit.
> This is detected by coccinelle.
>
> Signed-off-by: YueHaibing
Acked-by: Florian Fainelli
--
Florian
On 10/16/19 3:46 AM, YueHaibing wrote:
> devm_platform_ioremap_resource() internally have platform_get_resource()
> and devm_ioremap_resource() in it. So instead of calling them separately
> use devm_platform_ioremap_resource() directly.
Did your coccinelle script not cover
drivers/char/hw_random/
Corentin Labbe writes:
> This patch adds the GXL crypto hardware node for all GXL SoCs.
>
> Signed-off-by: Corentin Labbe
> ---
> arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 10 ++
> 1 file changed, 10 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
> b/arch/
On Tue, Oct 15, 2019 at 01:31:39PM +0200, Harald Freudenberger wrote:
> On 12.10.19 22:18, Eric Biggers wrote:
> > From: Eric Biggers
> >
> > Convert the glue code for the S390 CPACF protected key implementations
> > of AES-ECB, AES-CBC, AES-XTS, and AES-CTR from the deprecated
> > "blkcipher" API
Hi,
I have a few comments on the overall design and some implementation
details below.
Could you also Cc io...@lists.linux-foundation.org on your next posting?
I'm sure some subscribers would be interested and I don't think many
people know about linux-accelerators yet.
On Wed, Oct 16, 2019 at 0
Hi,
I already commented on the interface in patch 2/3, so I just have a few
additional comments on the documentation itself.
On Wed, Oct 16, 2019 at 04:34:31PM +0800, Zhangfei Gao wrote:
> +The user API
> +
> +
> +We adopt a polling style interface in the user space: ::
> +
> + in
On Wed, 2019-10-16 at 19:25 +0300, Jarkko Sakkinen wrote:
> On Wed, Oct 16, 2019 at 08:34:12AM -0400, James Bottomley wrote:
> > reversible ciphers are generally frowned upon in random number
> > generation, that's why the krng uses chacha20. In general I think
> > we shouldn't try to code our own
On Sun, Oct 13, 2019 at 10:41:06PM -0700, Randy Dunlap wrote:
> Hi,
>
> On 10/13/19 10:31 PM, Corentin Labbe wrote:
> > diff --git a/drivers/crypto/amlogic/Kconfig b/drivers/crypto/amlogic/Kconfig
> > new file mode 100644
> > index ..9c4bf96afeb3
> > --- /dev/null
> > +++ b/drivers/cry
Hi Stephan,
Please take a look at this repository
https://github.com/glebpom/rust-crypto-api/tree/mediatek-test
The rust code is in examples/test.rs. This is a simple test, which
runs 4 parallel AF_ALG encryptions through libaio with different block
sizes: 4096 and 8192 bytes.
You can build the co
On 2019/10/17 0:44, Florian Fainelli wrote:
> On 10/16/19 3:46 AM, YueHaibing wrote:
>> devm_platform_ioremap_resource() internally have platform_get_resource()
>> and devm_ioremap_resource() in it. So instead of calling them separately
>> use devm_platform_ioremap_resource() directly.
>
> Did
Hello
This serie adds support for the crypto offloader present on amlogic GXL
SoCs.
Tested on meson-gxl-s905x-khadas-vim and meson-gxl-s905x-libretech-cc
Regards
Changes since v2:
- fixed some spelling in kconfig
- Use devm_platform_ioremap_resource
Changes since v1:
- renamed files and algo w
I will maintain the amlogic crypto driver.
Signed-off-by: Corentin Labbe
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 2120c74f476a..59e360ca9fe7 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1477,6 +1477,13 @@ F: drivers/soc/am
This patch adds the GXL crypto hardware node for all GXL SoCs.
Reviewed-by: Kevin Hilman
Signed-off-by: Corentin Labbe
---
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
b/arch/arm64/boot/dts
This patch adds support for the amlogic GXL cryptographic offloader present
on GXL SoCs.
This driver supports AES cipher in CBC/ECB mode.
Signed-off-by: Corentin Labbe
---
drivers/crypto/Kconfig | 2 +
drivers/crypto/Makefile | 1 +
drivers/crypto/am
This patch adds documentation for Device-Tree bindings for the
Amlogic GXL cryptographic offloader driver.
Reviewed-by: Rob Herring
Signed-off-by: Corentin Labbe
---
.../bindings/crypto/amlogic,gxl-crypto.yaml | 52 +++
1 file changed, 52 insertions(+)
create mode 100644
Doc
On 2019/10/10 16:21, Zhou Wang wrote:
> As a type CRYPTO_ALG_TYPE_ACOMPRESS is needed to trigger crypto acomp test,
> we introduce a new help function tcrypto_test_extend to pass type and mask
> to alg_test.
>
> Then tcrypto module can be used to do basic acomp test by:
> insmod tcrypto.ko alg="zl
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