在 2025/4/30 下午4:58, Lee Jones 写道:
On Wed, 30 Apr 2025, Huacai Chen wrote:
On Wed, Apr 30, 2025 at 4:47 PM Qunqin Zhao wrote:
在 2025/4/30 下午4:18, Herbert Xu 写道:
On Wed, Apr 30, 2025 at 04:14:40PM +0800, Qunqin Zhao wrote:
Sorry to bother you, may i ask is it fine to move the Security Eng
On Wed, 30 Apr 2025, Huacai Chen wrote:
> On Wed, Apr 30, 2025 at 4:47 PM Qunqin Zhao wrote:
> >
> >
> > 在 2025/4/30 下午4:18, Herbert Xu 写道:
> > > On Wed, Apr 30, 2025 at 04:14:40PM +0800, Qunqin Zhao wrote:
> > >> Sorry to bother you, may i ask is it fine to move the Security Engine
> > >> base
On Wed, Apr 30, 2025 at 4:47 PM Qunqin Zhao wrote:
>
>
> 在 2025/4/30 下午4:18, Herbert Xu 写道:
> > On Wed, Apr 30, 2025 at 04:14:40PM +0800, Qunqin Zhao wrote:
> >> Sorry to bother you, may i ask is it fine to move the Security Engine base
> >> driver[Patch v8 1/5] to drivers/crypto ?
> >>
> >> The
在 2025/4/30 下午4:18, Herbert Xu 写道:
On Wed, Apr 30, 2025 at 04:14:40PM +0800, Qunqin Zhao wrote:
Sorry to bother you, may i ask is it fine to move the Security Engine base
driver[Patch v8 1/5] to drivers/crypto ?
The base driver uses MFD interface to register child device(tpm, rng) , as
don
On Wed, Apr 30, 2025 at 04:14:40PM +0800, Qunqin Zhao wrote:
>
> Sorry to bother you, may i ask is it fine to move the Security Engine base
> driver[Patch v8 1/5] to drivers/crypto ?
>
> The base driver uses MFD interface to register child device(tpm, rng) , as
> done in
>
> "drivers/iio/commo
在 2025/4/20 下午3:17, Huacai Chen 写道:
Hi, Qunqin,
On Fri, Apr 18, 2025 at 5:33 PM Qunqin Zhao wrote:
The Loongson Security Engine chip supports RNG, SM2, SM3 and SM4
accelerator engines. Each engine have its own DMA buffer provided
by the controller. The kernel cannot directly send commands to
Hi, Qunqin,
On Fri, Apr 18, 2025 at 5:33 PM Qunqin Zhao wrote:
>
> The Loongson Security Engine chip supports RNG, SM2, SM3 and SM4
> accelerator engines. Each engine have its own DMA buffer provided
> by the controller. The kernel cannot directly send commands to the
> engine and must first send
The Loongson Security Engine chip supports RNG, SM2, SM3 and SM4
accelerator engines. Each engine have its own DMA buffer provided
by the controller. The kernel cannot directly send commands to the
engine and must first send them to the controller, which will
forward them to the corresponding engin
The Loongson Security Engine chip supports RNG, SM2, SM3 and SM4
accelerator engines. Each engine have its own DMA buffer provided
by the controller. The kernel cannot directly send commands to the
engine and must first send them to the controller, which will
forward them to the corresponding engin
