On Wed, Jan 06, 2021 at 04:12:18PM +0530, Srujana Challa wrote:
>
> +static int cpt_ucode_load_fw(struct pci_dev *pdev, struct fw_info_t *fw_info)
> +{
> + char filename[OTX2_CPT_NAME_LENGTH];
> + char eng_type[8] = {0};
> + int ret, e, i;
> +
> + INIT_LIST_HEAD(&fw_info->ucodes);
>
CPT includes microcoded GigaCypher symmetric engines(SEs), IPsec
symmetric engines(IEs), and asymmetric engines (AEs).
Each engine receives CPT instructions from the engine groups it has
subscribed to. This patch loads microcode, configures three engine
groups(one for SEs, one for IEs and one for A
