Sven Auhagen wrote:
> Balance the irqs of the marvell cesa driver over all
> available cpus.
> Currently all interrupts are handled by the first CPU.
>
> From my testing with IPSec AES 256 SHA256
> on my clearfog base with 2 Cores I get a 2x speed increase:
>
> Before the patch: 26.74 Kpps
> Wit
Balance the irqs of the marvell cesa driver over all
available cpus.
Currently all interrupts are handled by the first CPU.
>From my testing with IPSec AES 256 SHA256
on my clearfog base with 2 Cores I get a 2x speed increase:
Before the patch: 26.74 Kpps
With the patch: 56.11 Kpps
Signed-off-by
