> This is a port of the ARMv7 implementation in arch/arm/crypto. For a
> Cortex-A57
> (r2p1), the performance numbers are listed below. In summary, 40% - 50%
> speedup
> where it counts, i.e., block sizes over 256 bytes with few updates.
Cool! Great! Just in case for reference. You compare gener
This is a port of the ARMv7 implementation in arch/arm/crypto. For a Cortex-A57
(r2p1), the performance numbers are listed below. In summary, 40% - 50% speedup
where it counts, i.e., block sizes over 256 bytes with few updates.
testing speed of async sha256 (sha256-generic)
( 16 byte blocks, 1
