Hi Herbert,
would you please merge this driver or is there anything else you want
me to address first?
Regards.
On 1 March 2013 12:37, Javier Martin wrote:
> SAHARA2 HW module is included in the i.MX27 SoC from
> Freescale. It is capable of performing cipher algorithms
> such as
provided by the devicetree then.
As Sascha stated you can safely drop this first patch:
[PATCH v3 1/2] i.MX27: Add clock support for SAHARA2.
And merge the second one:
[PATCH v3 2/2] crypto: sahara: Add driver for SAHARA2 accelerator.
Regards.
--
Javier Martin
Vista Silicon S.L.
CDTUC - FASE C - Of
Hi Sascha,
On 4 March 2013 08:53, Sascha Hauer wrote:
> On Fri, Mar 01, 2013 at 12:37:52PM +0100, Javier Martin wrote:
>>
>> Signed-off-by: Javier Martin
>> ---
>> arch/arm/mach-imx/clk-imx27.c |2 ++
>> 1 file changed, 2 insertions(+)
>>
>>
SAHARA2 HW module is included in the i.MX27 SoC from
Freescale. It is capable of performing cipher algorithms
such as AES, 3DES..., hashing and RNG too.
This driver provides support for AES-CBC and AES-ECB
by now.
Reviewed-by: Arnd Bergmann
Signed-off-by: Javier Martin
---
.../devicetree
Signed-off-by: Javier Martin
---
arch/arm/mach-imx/clk-imx27.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c
index 4c1d1e4..0b9664a 100644
--- a/arch/arm/mach-imx/clk-imx27.c
+++ b/arch/arm/mach-imx/clk-imx27.c
@@ -253,6
Hi,
the following changes since v2:
- Merge device tree binding with the driver code in the same patch.
- Specify that currently, only i.MX27 is supported in device tree binding.
- Replace MACH_MX27 by ARCH_MXC in Kconfig.
- Remove __devexit_p from sahara_remove().
I haven't finally included suppo
Hi Arnaud,
On 28 February 2013 12:07, Arnaud Patard wrote:
> Javier Martin writes:
>
> Hi,
>
>> SAHARA2 HW module is included in the i.MX27 SoC from
>> Freescale. It is capable of performing cipher algorithms
>> such as AES, 3DES..., hashing and RNG too.
>
&
On 27 February 2013 21:05, Sascha Hauer wrote:
> Hi Javier,
>
> On Wed, Feb 27, 2013 at 11:41:51AM +0100, Javier Martin wrote:
>>
>> Signed-off-by: Javier Martin
>> ---
>> .../devicetree/bindings/crypto/fsl-imx-sahara.txt | 14 ++
>> 1 fi
Signed-off-by: Javier Martin
---
.../devicetree/bindings/crypto/fsl-imx-sahara.txt | 14 ++
1 file changed, 14 insertions(+)
create mode 100644 Documentation/devicetree/bindings/crypto/fsl-imx-sahara.txt
diff --git a/Documentation/devicetree/bindings/crypto/fsl-imx-sahara.txt
SAHARA2 HW module is included in the i.MX27 SoC from
Freescale. It is capable of performing cipher algorithms
such as AES, 3DES..., hashing and RNG too.
This driver provides support for AES-CBC and AES-ECB
by now.
Signed-off-by: Javier Martin
---
drivers/crypto/Kconfig | 10 +
drivers
Signed-off-by: Javier Martin
---
arch/arm/mach-imx/clk-imx27.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c
index 4c1d1e4..0b9664a 100644
--- a/arch/arm/mach-imx/clk-imx27.c
+++ b/arch/arm/mach-imx/clk-imx27.c
@@ -253,6
Hi,
this v2 of the series solves several issues pointed out by Arnd Bergmann
and Arnaud Patard.
Moreover, it drops platform support and relies only on device tree (compile
tested only).
[PATCH v2 1/3] i.MX27: Add clock support for SAHARA2.
[PATCH v2 2/3] crypto: sahara: Add driver for SAHARA2 acc
Hi Arnaud,
thank you for your feedback. Sorry, I always forget to test my drivers
as modules.
I'll address the issues you pointed out, as well as the improvements
suggested by Arnd, for v2.
Regards.
On 23 February 2013 21:16, Arnaud Patard wrote:
> Javier Martin writes:
>
> Hi
On 21 February 2013 16:18, Sascha Hauer wrote:
> On Thu, Feb 21, 2013 at 03:18:36PM +0100, javier Martin wrote:
>> Hi Arnd,
>>
>> On 21 February 2013 13:59, Arnd Bergmann wrote:
>> > On Thursday 21 February 2013, Javier Martin wrote:
>> >> This ser
On 21 February 2013 15:40, Arnd Bergmann wrote:
> On Thursday 21 February 2013, javier Martin wrote:
>> We know about the existence of DT and the constant migration process
>> that is taking place towards it.
>>
>> Moreover we are strongly interested in converting the V
Hi Arnd,
thanks for your review.
On 21 February 2013 14:13, Arnd Bergmann wrote:
> On Thursday 21 February 2013, Javier Martin wrote:
>> +
>> +struct sahara_dev {
>> + struct device *device;
>> + void __iomem*regs_base;
>> +
Hi Arnd,
On 21 February 2013 13:59, Arnd Bergmann wrote:
> On Thursday 21 February 2013, Javier Martin wrote:
>> This series of patches provide AES-ECB and AES-CBC support
>> for the SAHARA2 cryptographic accelerator which is inside the i.MX27 SoC.
>> It is expected that mo
SAHARA2 HW module is included in the i.MX27 SoC from
Freescale. It is capable of performing cipher algorithms
such as AES, 3DES..., hashing and RNG too.
This driver provides support for AES-CBC and AES-ECB
by now.
Signed-off-by: Javier Martin
---
drivers/crypto/Kconfig | 10 +
drivers
Signed-off-by: Javier Martin
---
arch/arm/mach-imx/Kconfig |1 +
arch/arm/mach-imx/mach-imx27_visstrim_m10.c |1 +
2 files changed, 2 insertions(+)
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 1ad0d76..d232a56 100644
--- a/arch/arm/mach-imx
i.MX27 devices include this HW cryptographic
accelerator.
Signed-off-by: Javier Martin
---
arch/arm/mach-imx/clk-imx27.c |2 ++
arch/arm/mach-imx/devices-imx27.h |4 +++
arch/arm/mach-imx/devices/Kconfig |4 +++
arch/arm/mach-imx
This series of patches provide AES-ECB and AES-CBC support
for the SAHARA2 cryptographic accelerator which is inside the i.MX27 SoC.
It is expected that more algorithms will be supported in the future.
For testing, a Visstrim M10 board has been used and the code related
to this platform has been i
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