Hi,
Sorry for disturbing you.
I got a question: which API should my I/O Crypto device driver use,
SHASH or AHASH?
For performance, I would like to use AHASH since I/O device doing better
at asynchronous mode.
Thanks,
Zaibo
.
Agree with you, thanks!
Zaibo
.
On 2019/10/16 4:13, Rikard Falkeborn wrote:
Arguments are supposed to be ordered high then low.
Fixes: c8b4b477079d ("crypto: hisilicon - add HiSilicon HPRE accelerator")
Signed-off-by: Rikard Falkeborn
---
Spotted when trying to introduce compile time checkin
Hi,
On 2019/9/30 17:20, Zaibo Xu wrote:
This series adds HiSilicon high performance RSA engine(HPRE) driver
in crypto subsystem. HPRE driver provides PCIe hardware device initiation
with RSA and DH algorithms registered to Crypto. Meanwhile, some debug
supporting of DebugFS is given.
Zaibo Xu
Hi,
On 2018/8/2 18:10, Alan Cox wrote:
One motivation I guess, is that most accelerators lack of a
well-abstracted high level APIs similar to GPU side (e.g. OpenCL
clearly defines Shared Virtual Memory models). VFIO mdev
might be an alternative common interface to enable SVA usages
on various ac
