On Wed, Oct 28, 2020 at 6:50 PM Srujana Challa wrote:
>
> This series introduces crypto(CPT) drivers(PF & VF) for Marvell OcteonTX2
> CN96XX Soc.
>
> OcteonTX2 SOC's resource virtualization unit (RVU) supports multiple
> physical and virtual functions. Each of the PF/VF's functionality is
> determ
On Wed, Oct 28, 2020 at 5:52 PM Srujana Challa wrote:
>
> Attach LFs to CPT VF to process the crypto requests and register
> LF interrupts.
>
> Signed-off-by: Suheil Chandran
> Signed-off-by: Srujana Challa
> ---
> drivers/crypto/marvell/octeontx2/Makefile | 2 +-
> .../marvell/octeontx2/
On Wed, Oct 28, 2020 at 5:43 PM Srujana Challa wrote:
>
> CPT offload module utilises the linux crypto framework to offload
> crypto processing. This patch registers supported algorithms by
> calling registration functions provided by the kernel crypto API.
>
> The module currently supports:
> - A
On Wed, Oct 28, 2020 at 10:22 PM Srujana Challa wrote:
>
> Add entries to debugfs at /sys/kernel/debug/octeontx2/cpt.
>
> cpt_pc: dump cpt performance HW registers.
> Usage:
> cat /sys/kernel/debug/octeontx2/cpt/cpt_pc
>
> cpt_ae_sts: show cpt asymmetric engines current state
> Usage:
> cat /sys/k
On Wed, Oct 28, 2020 at 10:44 PM Srujana Challa wrote:
>
> On OcteonTX2 SoC, the admin function (AF) is the only one with all
> priviliges to configure HW and alloc resources, PFs and it's VFs
> have to request AF via mailbox for all their needs. This patch adds
> a mailbox interface for CPT PFs a
