CMP $0,%reg can't set overflow flag, so we can use shorter TEST %reg,%reg
instruction when only zero and sign flags are checked (E,L,LE,G,GE conditions).
Signed-off-by: Uros Bizjak
Cc: Herbert Xu
Cc: Borislav Petkov
Cc: "H. Peter Anvin"
---
arch/x86/crypto/poly1305-x86_64-cr
CMP $0,%reg can't set overflow flag, so we can use shorter TEST %reg,%reg
instruction when only zero and sign flags are checked (E,L,LE,G,GE conditions).
Signed-off-by: Uros Bizjak
Cc: Herbert Xu
Cc: Borislav Petkov
Cc: "H. Peter Anvin"
---
arch/x86/crypto/sha512-avx-asm.S |
CMP $0,%reg can't set overflow flag, so we can use shorter TEST %reg,%reg
instruction when only zero and sign flags are checked (E,L,LE,G,GE conditions).
Signed-off-by: Uros Bizjak
Cc: Herbert Xu
Cc: Borislav Petkov
Cc: "H. Peter Anvin"
---
arch/x86/crypto/aesni-intel_as
On Wed, Sep 2, 2020 at 11:17 AM wrote:
>
> On Wed, Sep 02, 2020 at 07:50:36AM +0200, Uros Bizjak wrote:
> > On Tue, Sep 1, 2020 at 9:12 PM Jason A. Donenfeld wrote:
> > >
> > > On Tue, Sep 1, 2020 at 8:13 PM Jason A. Donenfeld wrote:
> > > > oper
imization is applied to legacy registers.
Uros.
> Jason
>
> On Thu, Aug 27, 2020 at 07:38:31PM +0200, Uros Bizjak wrote:
> > x86_64 zero extends 32bit operations, so for 64bit operands,
> > XORL r32,r32 is functionally equal to XORQ r64,r64, but avoids
> > a REX prefix b
On Tue, Sep 1, 2020 at 9:12 PM Jason A. Donenfeld wrote:
>
> On Tue, Sep 1, 2020 at 8:13 PM Jason A. Donenfeld wrote:
> > operands are the same. Also, have you seen any measurable differences
> > when benching this? I can stick it into kbench9000 to see if you
> > haven't looked yet.
>
> On a Sky
x86_64 zero extends 32bit operations, so for 64bit operands,
XORL r32,r32 is functionally equal to XORQ r64,r64, but avoids
a REX prefix byte when legacy registers are used.
Signed-off-by: Uros Bizjak
Cc: Herbert Xu
Cc: "David S. Miller"
---
arch/x86/crypto/poly1305-x86_64-cryptog
x86_64 zero extends 32bit operations, so for 64bit operands,
XORL r32,r32 is functionally equal to XORL r64,r64, but avoids
a REX prefix byte when legacy registers are used.
Signed-off-by: Uros Bizjak
Cc: Herbert Xu
Cc: "David S. Miller"
---
arch/x86/crypto/curve25519-x86
jne13b
As the compiler has some more freedom w.r.t. register allocation,
there is also a couple of reg-reg moves removed.
There are no hidden states for CRC32 insn, so there is no need to mark
assembly as volatile.
Signed-off-by: Uros Bizjak
CC: Herbert Xu
CC: "David S. Miller
jne13b
As the compiler has some more freedom w.r.t. register allocation,
there is also a couple of reg-reg moves removed.
There are no hidden states for CRC32 insn, so there is no need to mark
assembly as volatile.
v2: Introduce CRC32_INST define.
Signed-off-by: Uros Bizjak
CC
Resolves conflict with the tip tree.
CC: Herbert Xu
CC: Thomas Gleixner
CC: Ingo Molnar
CC: Borislav Petkov
CC: "H. Peter Anvin"
CC: Stephen Rothwell ,
CC: "Chang S. Bae" ,
CC: Peter Zijlstra ,
CC: Sasha Levin
Signed-off-by: Uros Bizjak
---
arch/x86/incl
On Mon, Jul 20, 2020 at 6:03 AM Stephen Rothwell wrote:
> > Please find attached the incremental patch that puts back integer
> > parts of inst.h. This resolves the conflict with the tip tree.
>
> The tip tree change needs the XMM parts kept as well, sorry.
Strange, because I did test my patch w
Please find attached the incremental patch that puts back integer
parts of inst.h. This resolves the conflict with the tip tree.
Uros.
On Fri, Jul 17, 2020 at 8:45 AM Herbert Xu wrote:
>
> On Fri, Jul 17, 2020 at 08:27:27AM +0200, Uros Bizjak wrote:
> >
> > I will prepar
On Fri, Jul 17, 2020 at 6:47 AM Stephen Rothwell wrote:
>
> Hi all,
>
> Today's linux-next merge of the tip tree got a conflict in:
>
> arch/x86/include/asm/inst.h
>
> between commit:
>
> d7866e503bdc ("crypto: x86 - Remove include/asm/inst.h")
>
> from the crypto tree and commit:
>
> eaad98
from
x86/crypto directory, and remove now unneeded file.
The patch was tested by calculating and comparing sha256sum
hashes of stripped object files before and after the patch,
to be sure that executable code didn't change.
Signed-off-by: Uros Bizjak
CC: Herbert Xu
CC: "David S. M
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