On Thu, Feb 04, 2021 at 05:56:50PM +0100, Greg Kroah-Hartman wrote:
> On Thu, Feb 04, 2021 at 04:52:24PM +0000, Russell King - ARM Linux admin
> wrote:
> > On Tue, Feb 02, 2021 at 03:06:05PM +0100, Greg Kroah-Hartman wrote:
> > > I'm glad to take this through my char/
On Tue, Feb 02, 2021 at 03:06:05PM +0100, Greg Kroah-Hartman wrote:
> I'm glad to take this through my char/misc tree, as that's where the
> other coresight changes flow through. So if no one else objects, I will
> do so...
Greg, did you end up pulling this after all? If not, Uwe produced a v2.
I
> drivers/vfio, drivers/watchdog and sound/arm have no maintainer feedback
> yet).
>
> My suggestion is to let this series go in via Russell King (who cares
> for amba). Once enough Acks are there I can also provide a tag for
> merging into different trees. Just tell me if you pre
On Tue, Jan 26, 2021 at 06:56:52PM +0100, Uwe Kleine-König wrote:
> I'm surprised to see that the remove callback introduced in 2952ecf5df33
> ("coresight: etm4x: Refactor probing routine") has an __exit annotation.
In general, remove callbacks should not have an __exit annotation.
__exit _can_ be
On Fri, Jun 05, 2020 at 04:59:42PM +0800, Neal Liu wrote:
> On Fri, 2020-06-05 at 09:09 +0100, Russell King - ARM Linux admin wrote:
> > On Fri, Jun 05, 2020 at 03:19:03PM +0800, Neal Liu wrote:
> > > On Wed, 2020-06-03 at 17:34 +0800, Russell King - ARM Linux admin wrote:
&g
On Fri, Jun 05, 2020 at 03:19:03PM +0800, Neal Liu wrote:
> On Wed, 2020-06-03 at 17:34 +0800, Russell King - ARM Linux admin wrote:
> > This kind of thing is something that ARM have seems to shy away from
> > doing - it's a point I brought up many years ago when the whole
On Wed, Jun 03, 2020 at 08:40:58AM +0100, Marc Zyngier wrote:
> On 2020-06-03 08:29, Neal Liu wrote:
> > On Tue, 2020-06-02 at 21:02 +0800, Marc Zyngier wrote:
> > > On 2020-06-02 13:14, Ard Biesheuvel wrote:
> > > > On Tue, 2 Jun 2020 at 10:15, Neal Liu wrote:
> > > >>
> > > >> These patch series
On Wed, Nov 08, 2017 at 08:19:57PM +0100, Stefan Wahren wrote:
> Hi Florian,
> > + /* Clock is optional on most platforms */
> > + priv->clk = devm_clk_get(dev, NULL);
> > +
>
> At least EPROBE_DEFER should be handled here:
>
> if (IS_ERR(priv->clk) && PTR_ERR(priv->clk) == -EPROBE_DEFER)
>
On Sat, Nov 04, 2017 at 08:37:31PM +0100, Andrew Lunn wrote:
> Hi Florian
>
> > > >> + /* Clock is optional on most platforms */
> > > >> + priv->clk = devm_clk_get(dev, NULL);
> > > >> + if (IS_ERR(priv->clk))
> > > >> + priv->clk = NULL;
> > > >
> > > > at least in c
On Sun, Oct 15, 2017 at 10:19:45AM +0100, Gilad Ben-Yossef wrote:
> Many users of kernel async. crypto services have a pattern of
> starting an async. crypto op and than using a completion
> to wait for it to end.
>
> This patch set simplifies this common use case in two ways:
>
> First, by separ
riant for SafeXcel IP-76 found
in Armada 8K")
Signed-off-by: Russell King
---
drivers/char/hw_random/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig
index ceff2fc524b1..0cafe08919c9 100644
---
On Sat, Jan 14, 2017 at 04:24:35PM +0200, Krzysztof Kozlowski wrote:
> Hi,
>
> allyesconfig and multi_v7_defconfig fail to build on recent linux-next
> on GCC 6.2.0.
>
> Errors:
> ../arch/arm/crypto/aes-cipher-core.S: Assembler messages:
> ../arch/arm/crypto/aes-cipher-core.S:21: Error: selected
On Mon, Jan 02, 2017 at 09:06:04PM +, Ard Biesheuvel wrote:
> On 31 October 2016 at 16:13, Russell King - ARM Linux
> wrote:
> > On Sat, Oct 29, 2016 at 11:08:36AM +0100, Ard Biesheuvel wrote:
> >> On 18 October 2016 at 11:52, Ard Biesheuvel
> >> wrote:
>
Please include Thomas in this.
On Wed, Nov 09, 2016 at 10:46:21AM +0200, Horia Geantă wrote:
> This reverts commit 66d2e2028091a074aa1290d2eeda5ddb1a6c329c.
>
> Quoting from Russell's findings:
> https://www.mail-archive.com/linux-crypto@vger.kernel.org/msg21136.html
>
> [quote]
> Okay, I've re-
On Sat, Oct 29, 2016 at 11:08:36AM +0100, Ard Biesheuvel wrote:
> On 18 October 2016 at 11:52, Ard Biesheuvel wrote:
> > Wire up the generic support for exposing CPU feature bits via the
> > modalias in /sys/device/system/cpu. This allows udev to automatically
> > load modules for things like cryp
On Mon, Oct 17, 2016 at 01:28:00PM +0200, Marcus Folkesson wrote:
> i.MX6UL does only require three clocks to enable CAAM module.
>
> Signed-off-by: Marcus Folkesson
> Acked-by: Rob Herring
> Reviewed-by: Horia Geantă
> ---
> .../devicetree/bindings/crypto/fsl-sec4.txt| 20
On Tue, Sep 20, 2016 at 10:10:20PM +0200, Thomas Gleixner wrote:
> On Tue, 20 Sep 2016, Russell King - ARM Linux wrote:
> > which corresponds to an 8% slowdown for the threaded IRQ case. So,
> > tasklets are indeed faster than threaded IRQs.
>
> Fair enough.
>
> &
Okay, I've re-tested, using a different way of measuring, because using
openssl speed is impractical for off-loaded engines. I've decided to
use this way to measure the performance:
dd if=/dev/zero bs=1048576 count=128 | /usr/bin/time openssl dgst -md5
For the threaded IRQs case gives:
0.05user
On Fri, Sep 16, 2016 at 02:01:00PM +, Cata Vasile wrote:
> Hi,
>
> We've tried to test and benchmark your submitted work[1].
>
> Cryptographic offloading is also used in IPsec in the Linux Kernel. In
> heavy traffic scenarios, the NIC driver competes with the crypto device
> driver. Most NICs
Hi,
While testing AF_ALG with openssl af-alg-rr, I've found that:
OPENSSL_CONF=/shared/crypto/openssl-imx.cnf openssl dgst -sha1 http://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
according to speedtest.net.
--
To unsubscribe from t
[] (ret_fast_syscall+0x0/0x1c)
---[ end trace 34e3370d88bb1788 ]---
Signed-off-by: Russell King
---
drivers/crypto/caam/ctrl.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c
index 0ec112ee5204..f4c044f5bcb2 100644
--- a/drivers/crypto/caam
On Tue, Aug 09, 2016 at 03:14:02PM +0800, Herbert Xu wrote:
> On Tue, Aug 09, 2016 at 08:08:59AM +0100, Russell King - ARM Linux wrote:
> >
> > I thought I gave the commands and link to your example code. The
> > openssl case is md5, though sha* also gives the same result.
On Tue, Aug 09, 2016 at 11:18:20AM +0800, Herbert Xu wrote:
> Russell King - ARM Linux wrote:
> > Testing that code on 4.8-rc (and 4.7 fwiw) gives:
> >
> > socket(PF_ALG, SOCK_SEQPACKET, 0) = 3
> > bind(3, {sa_family=AF_ALG, sa_data="hash\0\0\0\0\0\0\0\
On Mon, Aug 08, 2016 at 08:30:32PM +0200, Stephan Mueller wrote:
> Am Montag, 8. August 2016, 20:18:32 CEST schrieb Stephan Mueller:
>
> Hi Stephan,
>
> > Am Montag, 8. August 2016, 17:44:27 CEST schrieb Russell King - ARM Linux:
> >
> > Hi Russell,
> >
&
On Mon, Aug 08, 2016 at 01:47:33PM -0400, Jeffrey Walton wrote:
> > When trying to use the openssl AF_ALG module with 4.8-rc1 with imx
> > caam, I get this:
> >
> > $ OPENSSL_CONF=/shared/crypto/openssl-imx.cnf strace openssl dgst -md5
> > > ...
> > socket(PF_ALG, SOCK_SEQPACKET, 0) = 3
> >
Signed-off-by: Russell King
---
drivers/crypto/caam/caamhash.c | 84 +-
1 file changed, 34 insertions(+), 50 deletions(-)
diff --git a/drivers/crypto/caam/caamhash.c b/drivers/crypto/caam/caamhash.c
index 2c2c15b63059..9c3e74e4088e 100644
--- a/drivers
Add a helper to map the source scatterlist into the descriptor.
Signed-off-by: Russell King
---
drivers/crypto/caam/caamhash.c | 137 +
1 file changed, 57 insertions(+), 80 deletions(-)
diff --git a/drivers/crypto/caam/caamhash.c b/drivers/crypto/caam
: Russell King
---
drivers/crypto/caam/intern.h | 1 -
drivers/crypto/caam/jr.c | 25 +
2 files changed, 9 insertions(+), 17 deletions(-)
diff --git a/drivers/crypto/caam/intern.h b/drivers/crypto/caam/intern.h
index e2bcacc1a921..5d4c05074a5c 100644
--- a/drivers/crypto
Add a helper function to perform the descriptor allocation.
Signed-off-by: Russell King
---
drivers/crypto/caam/caamhash.c | 60 +++---
1 file changed, 33 insertions(+), 27 deletions(-)
diff --git a/drivers/crypto/caam/caamhash.c b/drivers/crypto/caam
entries to allocate, and then fill them in. This allows
us to keep relatively simple error cleanup paths.
Signed-off-by: Russell King
---
drivers/crypto/caam/caamhash.c | 138 ++---
1 file changed, 103 insertions(+), 35 deletions(-)
diff --git a/drivers/crypto
Rather than giving the descriptor as hw_desc[0], give it's real size.
All places where we allocate an ahash_edesc incorporate DESC_JOB_IO_LEN
bytes of job descriptor.
Signed-off-by: Russell King
---
drivers/crypto/caam/caamhash.c | 49 --
1 file ch
-off-by: Russell King
---
drivers/crypto/caam/caamhash.c | 12 +++-
1 file changed, 3 insertions(+), 9 deletions(-)
diff --git a/drivers/crypto/caam/caamhash.c b/drivers/crypto/caam/caamhash.c
index e9c52cbf9a41..d2129be43bf1 100644
--- a/drivers/crypto/caam/caamhash.c
+++ b/drivers/crypto
Mark the hardware descriptor as being cache line aligned; on DMA
incoherent architectures, the hardware descriptor should sit in a
separate cache line from the CPU accessed data to avoid polluting
the caches.
Signed-off-by: Russell King
---
drivers/crypto/caam/caamhash.c | 2 +-
1 file changed
Signed-off-by: Russell King
---
drivers/crypto/caam/caamhash.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/crypto/caam/caamhash.c b/drivers/crypto/caam/caamhash.c
index 85c8b048bdc1..47ea7b428156 100644
--- a/drivers/crypto/caam/caamhash.c
+++ b
Ensure that we clean up allocations and DMA mappings after encountering
an error rather than just giving up and leaking memory and resources.
Signed-off-by: Russell King
---
drivers/crypto/caam/caamhash.c | 132 -
1 file changed, 79 insertions(+), 53
es my sshd, openssl tests hashing /bin and tcrypt
tests.
Signed-off-by: Russell King
---
drivers/crypto/caam/caamhash.c | 26 +-
1 file changed, 17 insertions(+), 9 deletions(-)
diff --git a/drivers/crypto/caam/caamhash.c b/drivers/crypto/caam/caamhash.c
index f1ecc8df8d41
This is a re-post (with hopefully bugs fixed from December's review).
Untested, because AF_ALG appears to be broken in 4.8-rc1. Maybe
someone can provide some hints how to test using tcrypt please?
Here are further imx-caam updates that I've had since before the
previous merge window. Please rev
Hi,
When trying to use the openssl AF_ALG module with 4.8-rc1 with imx
caam, I get this:
$ OPENSSL_CONF=/shared/crypto/openssl-imx.cnf strace openssl dgst -md5
http://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up
according to speedte
On Thu, Mar 31, 2016 at 04:45:57PM +0200, Boris Brezillon wrote:
> Hi Russell,
>
> On Thu, 31 Mar 2016 15:14:13 +0100
> Russell King - ARM Linux wrote:
>
> > On Thu, Mar 31, 2016 at 02:29:42PM +0200, Boris Brezillon wrote:
> > > sg_alloc_table_from_buf() provides
On Thu, Mar 31, 2016 at 02:29:42PM +0200, Boris Brezillon wrote:
> sg_alloc_table_from_buf() provides an easy solution to create an sg_table
> from a virtual address pointer. This function takes care of dealing with
> vmallocated buffers, buffer alignment, or DMA engine limitations (maximum
> DMA t
On Thu, Mar 17, 2016 at 07:17:24PM -0400, ok...@codeaurora.org wrote:
> What is the correct way? I don't want to write engine->sram_dma = sram
Well, what the driver _is_ wanting to do is to go from a CPU physical
address to a device DMA address. phys_to_dma() looks like the correct
thing there to
On Thu, Mar 17, 2016 at 06:02:15PM -0400, Sinan Kaya wrote:
> Getting ready to remove dma_to_phys API. Drivers should not be
> using this API for DMA operations. Instead, they should go
> through the dma_map or dma_alloc APIs.
>
> Signed-off-by: Sinan Kaya
> ---
> drivers/crypto/marvell/cesa.c |
On Wed, Dec 09, 2015 at 05:20:45PM +0200, Horia Geantă wrote:
> On 12/7/2015 9:12 PM, Russell King wrote:
> > Strictly, dma_map_sg() may coalesce SG entries, but in practise on iMX
> > hardware, this will never happen. However, dma_map_sg() can fail, and
> > we completely fai
On Wed, Dec 09, 2015 at 05:08:41PM +0200, Horia Geantă wrote:
> On 12/7/2015 9:12 PM, Russell King wrote:
> > Ensure that we clean up allocations and DMA mappings after encountering
> > an error rather than just giving up and leaking memory and resources.
> >
> >
On Wed, Dec 09, 2015 at 05:06:03PM +0200, Horia Geantă wrote:
> On 12/7/2015 9:11 PM, Russell King - ARM Linux wrote:
> > Here are further imx-caam updates that I've had since before the
> > previous merge window. Please review and (I guess) if Freescale
> > folk can p
Signed-off-by: Russell King
---
drivers/crypto/caam/caamhash.c | 84 +-
1 file changed, 34 insertions(+), 50 deletions(-)
diff --git a/drivers/crypto/caam/caamhash.c b/drivers/crypto/caam/caamhash.c
index f35f4cfc27a7..241268d108ec 100644
--- a/drivers
Add a helper to map the source scatterlist into the descriptor.
Signed-off-by: Russell King
---
drivers/crypto/caam/caamhash.c | 106 +++--
1 file changed, 49 insertions(+), 57 deletions(-)
diff --git a/drivers/crypto/caam/caamhash.c b/drivers/crypto/caam
: Russell King
---
drivers/crypto/caam/intern.h | 1 -
drivers/crypto/caam/jr.c | 25 +
2 files changed, 9 insertions(+), 17 deletions(-)
diff --git a/drivers/crypto/caam/intern.h b/drivers/crypto/caam/intern.h
index e2bcacc1a921..5d4c05074a5c 100644
--- a/drivers/crypto
Rather than giving the descriptor as hw_desc[0], give it's real size.
All places where we allocate an ahash_edesc incorporate DESC_JOB_IO_LEN
bytes of job descriptor.
Signed-off-by: Russell King
---
drivers/crypto/caam/caamhash.c | 49 --
1 file ch
Add a helper function to perform the descriptor allocation.
Signed-off-by: Russell King
---
drivers/crypto/caam/caamhash.c | 60 +++---
1 file changed, 33 insertions(+), 27 deletions(-)
diff --git a/drivers/crypto/caam/caamhash.c b/drivers/crypto/caam
Ensure that we clean up allocations and DMA mappings after encountering
an error rather than just giving up and leaking memory and resources.
Signed-off-by: Russell King
---
drivers/crypto/caam/caamhash.c | 57 ++
1 file changed, 52 insertions(+), 5
Mark the hardware descriptor as being cache line aligned; on DMA
incoherent architectures, the hardware descriptor should sit in a
separate cache line from the CPU accessed data to avoid polluting
the caches.
Signed-off-by: Russell King
---
drivers/crypto/caam/caamhash.c | 2 +-
1 file changed
entries to allocate, and then fill them in. This allows
us to keep relatively simple error cleanup paths.
Signed-off-by: Russell King
---
drivers/crypto/caam/caamhash.c | 109 -
1 file changed, 74 insertions(+), 35 deletions(-)
diff --git a/drivers/crypto
-off-by: Russell King
---
drivers/crypto/caam/caamhash.c | 12 +++-
1 file changed, 3 insertions(+), 9 deletions(-)
diff --git a/drivers/crypto/caam/caamhash.c b/drivers/crypto/caam/caamhash.c
index 0a9665140d26..d48974d1897d 100644
--- a/drivers/crypto/caam/caamhash.c
+++ b/drivers/crypto
es my sshd, openssl tests hashing /bin and tcrypt
tests.
Signed-off-by: Russell King
---
drivers/crypto/caam/caamhash.c | 28 ++--
1 file changed, 18 insertions(+), 10 deletions(-)
diff --git a/drivers/crypto/caam/caamhash.c b/drivers/crypto/caam/caamhash.c
index 49106ea42887
Here are further imx-caam updates that I've had since before the
previous merge window. Please review and (I guess) if Freescale
folk can provide acks etc that would be nice. Thanks.
drivers/crypto/caam/caamhash.c | 415 +++--
drivers/crypto/caam/intern.h |
Signed-off-by: Russell King
---
drivers/crypto/caam/caamhash.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/crypto/caam/caamhash.c b/drivers/crypto/caam/caamhash.c
index eccde7207f92..6a6d74f38300 100644
--- a/drivers/crypto/caam/caamhash.c
+++ b
On Tue, Oct 20, 2015 at 01:26:55AM +0200, Arnaud Ebalard wrote:
> Hi Russell,
>
> Russell King writes:
>
> > Use the IO memcpy() functions when copying from/to MMIO memory.
> > These locations were found via sparse.
>
> On recent MVEBU hardware, *_std_* functi
On Mon, Oct 19, 2015 at 03:04:51PM +, Jason Cooper wrote:
> Hey Russell,
>
> On Sun, Oct 18, 2015 at 05:23:40PM +0100, Russell King wrote:
> > static int mv_cesa_ahash_init(struct ahash_request *req,
> > - struct
When tdma->src is freed in mv_cesa_dma_cleanup(), we convert the DMA
address from a little-endian value prior to calling dma_pool_free().
However, mv_cesa_dma_add_op() assigns tdma->src without first converting
the DMA address to little endian. Fix this.
Signed-off-by: Russell King
---
d
Much of the driver uses cpu_to_le32() to convert values for descriptors
to little endian before writing. Use __le32 to define the hardware-
accessed parts of the descriptors, and ensure most places where it's
reasonable to do so use cpu_to_le32() when assigning to these.
Signed-off-by: Ru
cur_dma is part of the software state, not read by the hardware.
Storing it in LE32 format is wrong, use dma_addr_t for this.
Signed-off-by: Russell King
---
drivers/crypto/marvell/cesa.h | 4 +++-
drivers/crypto/marvell/tdma.c | 6 +++---
2 files changed, 6 insertions(+), 4 deletions(-)
diff
Use the IO memcpy() functions when copying from/to MMIO memory.
These locations were found via sparse.
Signed-off-by: Russell King
---
drivers/crypto/marvell/cipher.c | 11 ++-
drivers/crypto/marvell/hash.c | 16
2 files changed, 14 insertions(+), 13 deletions
Use gfp_t not u32 for the GFP flags.
Signed-off-by: Russell King
---
drivers/crypto/marvell/cesa.h | 6 ++
drivers/crypto/marvell/tdma.c | 5 ++---
2 files changed, 4 insertions(+), 7 deletions(-)
diff --git a/drivers/crypto/marvell/cesa.h b/drivers/crypto/marvell/cesa.h
index dbe4970d6c64
Use relaxed IO accessors where appropriate.
Signed-off-by: Russell King
---
drivers/crypto/marvell/cesa.h | 2 +-
drivers/crypto/marvell/cipher.c | 2 +-
drivers/crypto/marvell/hash.c | 7 +++
drivers/crypto/marvell/tdma.c | 20 ++--
4 files changed, 15 insertions
Continuing on from the previous set of 18 patches, I also fixed a
number of sparse problems and other cleanups. I don't deem these
suitable for -rc merging, especially now that we're basically at
-rc6.
The first patch switches the driver over to appropriately using
the relaxed IO accessors - this
dopt the re-work solution here - we replace sg_count() with
__sg_count(), so src_nents now contains the real number of scatterlist
entries, and we then change the test for using the hardware scatterlist
to src_nents > 1 rather than just non-zero.
This change passes my sshd, openssl tests hashing
The kernel's coding style suggests that closing braces for initialisers
should not be aligned to the open brace column. The CodingStyle doc
shows how this should be done. Remove the additional tab.
Signed-off-by: Russell King
---
drivers/crypto/caam/caamhash.c | 12 ++--
1
-off-by: Russell King
---
drivers/crypto/caam/caamhash.c | 44 ++
1 file changed, 40 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto/caam/caamhash.c b/drivers/crypto/caam/caamhash.c
index dcee360065f3..7dd80b0b3f51 100644
--- a/drivers/crypto/caam
The following series fixes the CAAM hash driver, allowing it to work
with the previously merged "crypto: ahash - ensure statesize is non-
zero" patch.
This is non-trivial, because CAAM exports a huge 1600 bytes of data,
which, if we set .statesize to this, still results in the core code
rejecting
Print the errno code when hash registration fails, so we know why the
failure occurred. This aids debugging.
Signed-off-by: Russell King
---
drivers/crypto/caam/caamhash.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto/caam/caamhash.c b/drivers
hat bad
behaviour by CAAM.
Fixes: 7d5196aba3c8 ("crypto: caam - Correct DMA unmap size in
ahash_update_ctx()")
Signed-off-by: Russell King
---
drivers/crypto/caam/caamhash.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/caam/caamhash.c b/driver
ste of resources. So, remove this code.
Signed-off-by: Russell King
---
drivers/crypto/caam/caamhash.c | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/drivers/crypto/caam/caamhash.c b/drivers/crypto/caam/caamhash.c
index 2faf71ccbd43..3ce6083c2e43 100644
--- a/d
as a separate operation.
This ensures that the hardware only ever sees multiples of the hash
block size to be operated on for software padded hashes, thus ensuring
that the engine always indicates that it has finished the calculation.
Signed-off-by: Russell King
---
drivers/crypto/marvell/hash.c
mv_cesa_get_op_cfg() does not write to its argument, it only reads.
So, let's make it const.
Signed-off-by: Russell King
---
drivers/crypto/marvell/cesa.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/marvell/cesa.h b/drivers/crypto/marvell/cesa.h
makes the loop operation more obvious and understandable.
2. move the operation generation for the cache-only case.
This prepares the code for the next step in its transformation, and also
uncovers a bug that will be fixed in the next patch.
Signed-off-by: Russell King
---
drivers/crypto/marvell
up by
mv_cesa_dma_cleanup() in case of errors.
Signed-off-by: Boris Brezillon
Reported-by: Thomas Petazzoni
Signed-off-by: Russell King
---
drivers/crypto/marvell/hash.c | 22 ++
1 file changed, 10 insertions(+), 12 deletions(-)
diff --git a/drivers/crypto/marvell/hash.
Multiple locations in the driver test the operation context fragment
type, checking whether it is a first fragment or not. Introduce a
mv_cesa_mac_op_is_first_frag() helper, which returns true if the
fragment operation is for a first fragment.
Signed-off-by: Russell King
---
drivers/crypto
When adding the software padding, this must be done using the first/mid
fragment mode, and any subsequent operation needs to be a mid-fragment.
Fix this.
Signed-off-by: Russell King
---
drivers/crypto/marvell/hash.c | 8
1 file changed, 8 deletions(-)
diff --git a/drivers/crypto
these parts.
Signed-off-by: Russell King
---
drivers/crypto/marvell/hash.c | 35 ---
1 file changed, 24 insertions(+), 11 deletions(-)
diff --git a/drivers/crypto/marvell/hash.c b/drivers/crypto/marvell/hash.c
index b8ed0478031a..d2265beaaa6b 100644
--- a/drivers
: Russell King
---
drivers/crypto/marvell/hash.c | 19 +++
1 file changed, 7 insertions(+), 12 deletions(-)
diff --git a/drivers/crypto/marvell/hash.c b/drivers/crypto/marvell/hash.c
index 8111e73ca848..f567243da005 100644
--- a/drivers/crypto/marvell/hash.c
+++ b/drivers/crypto
Avoid adding the final operation within the loop, but instead add it
outside. We combine this with the handling for the no-data case.
Signed-off-by: Russell King
---
drivers/crypto/marvell/hash.c | 24 +---
1 file changed, 17 insertions(+), 7 deletions(-)
diff --git a
Move the test for the last request out of mv_cesa_ahash_dma_last_req()
to its caller, and move the mv_cesa_dma_add_frag() down into this
function.
Signed-off-by: Russell King
---
drivers/crypto/marvell/hash.c | 30 +++---
1 file changed, 19 insertions(+), 11 deletions
be harmless as
the only thing which matters is to have all the data loaded into SRAM
prior to launching the operation.
Signed-off-by: Russell King
---
drivers/crypto/marvell/hash.c | 74 +--
1 file changed, 36 insertions(+), 38 deletions(-)
diff --git a
-no-user-data case to make the next change clearer.
Signed-off-by: Russell King
---
drivers/crypto/marvell/hash.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto/marvell/hash.c b/drivers/crypto/marvell/hash.c
index c4693321fdc8..b4da73d294af 100644
--
Move the calls to mv_cesa_dma_add_frag() into the parent function,
mv_cesa_ahash_dma_req_init(). This is in preparation to changing
when we generate the operation blocks, as we need to avoid generating
a block for a partial hash block at the end of the user data.
Signed-off-by: Russell King
Ensure that the template operation is fully initialised, otherwise we
end up loading data from the kernel stack into the engines, which can
upset the hash results.
Signed-off-by: Russell King
---
drivers/crypto/marvell/hash.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions
Rather than determining whether we're using a MD5 hash by looking at
the digest size, switch to a cleaner solution using a per-request flag
initialised by the method type.
Signed-off-by: Russell King
---
drivers/crypto/marvell/cesa.h | 1 +
drivers/crypto/marvell/hash.c
The endianness of the bit length used in the final stage depends on the
endianness of the algorithm - md5 hashes need it to be in little endian
format, whereas SHA hashes need it in big endian format. Use the
previously added algorithm endianness flag to control this.
Signed-off-by: Russell King
to the result.
Signed-off-by: Russell King
---
drivers/crypto/marvell/cesa.h | 2 +-
drivers/crypto/marvell/hash.c | 25 ++---
2 files changed, 15 insertions(+), 12 deletions(-)
diff --git a/drivers/crypto/marvell/cesa.h b/drivers/crypto/marvell/cesa.h
index bc2a55bc3
There's an easier way to get at the hash transform - rather than
using crypto_ahash_tfm(ahash), we can get it directly from
req->base.tfm.
Signed-off-by: Russell King
---
drivers/crypto/marvell/hash.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto
Following on from the previous series, this series addresses further
problems with the Marvell CESA hash driver found while testing it my
openssl/ssh scenarios.
The first patch improves one from the previous series: we can get the
transform more directly using req->base.tfm rather than going round
On Sat, Oct 17, 2015 at 07:50:55PM +0100, Russell King - ARM Linux wrote:
> The following series fixes the CAAM hash driver, allowing it to work
> with the previously merged "crypto: ahash - ensure statesize is non-
> zero" patch.
>
> This is non-trivial, because CAAM exp
: 3d03d100 0026
sg@892: ed03d958: 7e8aa700 4020
which replaces the 0x06 length with the correct 0x26 bytes of previously
unhashed data.
Signed-off-by: Russell King
---
drivers/crypto/caam/caamhash.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
di
-off-by: Russell King
---
drivers/crypto/caam/caamhash.c | 44 ++
1 file changed, 40 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto/caam/caamhash.c b/drivers/crypto/caam/caamhash.c
index dcee360065f3..7dd80b0b3f51 100644
--- a/drivers/crypto/caam
Print the errno code when hash registration fails, so we know why the
failure occurred. This aids debugging.
Signed-off-by: Russell King
---
drivers/crypto/caam/caamhash.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto/caam/caamhash.c b/drivers
ste of resources. So, remove this code.
Signed-off-by: Russell King
---
drivers/crypto/caam/caamhash.c | 12
1 file changed, 4 insertions(+), 8 deletions(-)
diff --git a/drivers/crypto/caam/caamhash.c b/drivers/crypto/caam/caamhash.c
index 2faf71ccbd43..3ce6083c2e43 100644
--- a/d
The kernel's coding style suggests that closing braces for initialisers
should not be aligned to the open brace column. The CodingStyle doc
shows how this should be done. Remove the additional tab.
Signed-off-by: Russell King
---
drivers/crypto/caam/caamhash.c | 15 ++-
1
The following series fixes the CAAM hash driver, allowing it to work
with the previously merged "crypto: ahash - ensure statesize is non-
zero" patch.
This is non-trivial, because CAAM exports a huge 1600 bytes of data,
which, if we set .statesize to this, still results in the core code
rejecting
On Fri, Oct 16, 2015 at 04:19:33PM -0700, Victoria Milhoan wrote:
> @@ -1569,6 +1601,10 @@ static int ahash_import(struct ahash_request *req,
> const void *in)
> struct caam_hash_ctx *ctx = crypto_ahash_ctx(ahash);
> struct caam_hash_state *state = ahash_request_ctx(req);
>
> + /
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