:- Ruchika Gupta
Tested on P4080DS.
Ported and tested on LS1 platform also (This platform has the virtualization
enabled).
Thanks,
Ruchika
> -Original Message-
> From: Horia Geanta [mailto:horia.gea...@freescale.com]
> Sent: Monday, July 21, 2014 6:33 PM
> To: Herbe
The layer which registers with the crypto API should check for the presence of
the CAAM device it is going to use. If the platform's device tree doesn't have
the required CAAM node, the layer should return an error and not register the
algorithms with crypto API layer.
Signed-off-b
The layer which registers with the crypto API should check for the presence of
the CAAM device it is going to use. If the platform's device tree doesn't have
the required CAAM node, the layer should return an error and not register the
algorithms with crypto API layer.
Signed-off-b
The layer which registers with the crypto API should check for the presence of
the CAAM device it is going to use. If the platform's device tree doesn't have
the required CAAM node, the layer should return an error and not register the
algorithms with crypto API layer.
Signed-off-b
it is populated
by the driver, making it read-only as per the DMA API's requirement.
Signed-off-by: Ruchika Gupta
---
drivers/crypto/caam/caamalg.c | 8
drivers/crypto/caam/caamhash.c | 40 +++-
2 files changed, 27 insertions(+), 21 dele
CAAM IP has certain 64 bit registers . 32 bit architectures cannot force
atomic-64 operations. This patch adds definition of these atomic-64
operations for little endian platforms. The definitions which existed
previously were for big endian platforms.
Signed-off-by: Ruchika Gupta
---
Tested on
ed to be provided. These are provided by
selecting a Job ring in start mode whose parameters would be used for the
DECO access programming.
Signed-off-by: Ruchika Gupta
---
The current patch used the 32 bit register comp_params_ms defined in another
patch.
The link of patch thsi
as
other registers which are truly double word in nature.
So, for the IP to work correctly on big-endian as well as
little-endian SoC's, change is required to access all 32 bit
registers as 32 bit quantities.
Signed-off-by: Ruchika Gupta
---
drivers/crypto/caam/ctrl.c | 14 +
dr
as
other registers which are truly double word in nature.
So, for the IP to work correctly on big-endian as well as
little-endian SoC's, change is required to access all 32 bit
registers as 32 bit quantities.
Signed-off-by: Ruchika Gupta
---
drivers/crypto/caam/ctrl.c | 14 +
dr
as
other registers which are truly double word in nature.
So, for the IP to work correctly on big-endian as well as
little-endian SoC's, change is required to access all 32 bit
registers as 32 bit quantities.
Signed-off-by: Ruchika Gupta
---
Changed in v2:
1. Review comments incorpora
h of few read only registers
>
> On Tue, 29 Apr 2014 15:34:37 +0530
> Ruchika Gupta wrote:
>
> > Few read only registers like CHAVID, CTPR etc were wrongly defined as
> > 64 bit registers. This functioned properly on the powerpc platforms.
> > However ARM SoC'
> > > > From: Kim Phillips [mailto:kim.phill...@freescale.com]
> > > > > Sent: Friday, May 02, 2014 2:15 AM
> > > > >
> > > > > On Tue, 29 Apr 2014 15:34:37 +0530 Ruchika Gupta
> > > > > wrote:
> > > > >
> > &g
h of few read only registers
>
> On Tue, 6 May 2014 05:11:23 -0500
> Gupta Ruchika-R66431 wrote:
>
> > > From: Kim Phillips [mailto:kim.phill...@freescale.com]
> > > Sent: Friday, May 02, 2014 2:15 AM
> > >
> > > On Tue, 29 Apr 2014 15:34:37 +0530
>
registers
>
> On Tue, 29 Apr 2014 15:34:37 +0530
> Ruchika Gupta wrote:
>
> > Few read only registers like CHAVID, CTPR etc were wrongly defined as
> > 64 bit registers. This functioned properly on the powerpc platforms.
> > However ARM SoC's wouldn't f
The kernel defines setbits32() and clrbits32() macros only for
Power-based architectures. This patch modifies the Freescale CAAM
driver to add macros for use on ARM architectures.
Signed-off-by: Victoria Milhoan
Signed-off-by: Ruchika Gupta
---
drivers/crypto/caam/regs.h | 6 ++
1 file
ned-off-by: Ruchika Gupta
---
drivers/crypto/caam/ctrl.c | 17 +--
drivers/crypto/caam/regs.h | 71 +-
2 files changed, 47 insertions(+), 41 deletions(-)
diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c
index 1c38f86..5d878
ned-off-by: Ruchika Gupta
---
drivers/crypto/caam/ctrl.c | 17 +--
drivers/crypto/caam/regs.h | 71 +-
2 files changed, 47 insertions(+), 41 deletions(-)
diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c
index 1c38f86..5d878
Reviewed-by: Ruchika Gupta
> -Original Message-
> From: Vakul Garg [mailto:va...@freescale.com]
> Sent: Sunday, April 27, 2014 8:56 PM
> To: linux-crypto@vger.kernel.org
> Cc: herb...@gondor.apana.org.au; Geanta Neag Horia Ioan-B05471; Gupta
> Ruchika-R66431; Porosan
The layer which registers with the crypto API should check for the presence of
the CAAM device it is going to use. If the platform's device tree doesn't have
the required CAAM node, the layer should return an error and not register the
algorithms with crypto API layer.
Signed-off-b
Acked-by: Ruchika Gupta
> -Original Message-
> From: Yashpal Dutta [mailto:yashpal.du...@freescale.com]
> Sent: Friday, March 21, 2014 12:30 AM
> To: linux-crypto@vger.kernel.org; Gupta Ruchika-R66431; Garg Vakul-B16394;
> Geanta Neag Horia Ioan-B05471
> Cc: Dutta Y
Acked-by: Ruchika Gupta
> -Original Message-
> From: Yashpal Dutta [mailto:yashpal.du...@freescale.com]
> Sent: Friday, March 21, 2014 12:21 AM
> To: linux-crypto@vger.kernel.org; Geanta Neag Horia Ioan-B05471; Garg Vakul-
> B16394; Gupta Ruchika-R66431
> Cc: Dutta Y
Acked-by: Ruchika Gupta
> -Original Message-
> From: Nitesh Lal [mailto:niteshnarayan...@freescale.com]
> Sent: Friday, March 07, 2014 4:06 PM
> To: linux-crypto@vger.kernel.org; Gupta Ruchika-R66431; Dutta Yashpal-
> B05456; herb...@gondor.apana.org
> Cc: Lal Nites
caam/jr.c
> @@ -6,6 +6,7 @@
> */
>
> #include
> +#include
>
> #include "compat.h"
> #include "regs.h"
> --
> 1.8.4.1
>
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-crypto" in
> the body of a me
nb.auug.org.au
> Subject: RE: [PATCH] crypto: caam - Add missing Job Ring include
>
> Acked-by: Ruchika Gupta
>
> > -Original Message-
> > From: linux-crypto-ow...@vger.kernel.org [mailto:linux-crypto-
> > ow...@vger.kernel.org] On Behalf Of Michael Neuling
Acked-by: Ruchika Gupta
> -Original Message-
> From: linux-crypto-ow...@vger.kernel.org [mailto:linux-crypto-
> ow...@vger.kernel.org] On Behalf Of Michael Neuling
> Sent: Monday, November 18, 2013 9:50 AM
> To: Gupta Ruchika-R66431
> Cc: Garg Vakul-B16394; Herber
- Earlier interface layers - caamalg, caamhash, caamrng were
directly using the Controller driver private structure to access
the Job ring.
- Changed the above to use alloc/free API's provided by Job Ring Drive
Signed-off-by: Ruchika Gupta
Reviewed-by: Garg Vakul-B16394
---
drivers/c
initialization of CAAM Block.
- Creates platform devices for Job Rings.
(Earlier the initialization of Job ring was done
by the controller driver)
2. JobRing Platform driver
- Manages the platform Job Ring devices created
by the controller driver
Signed-off-by: Ruchika Gupta
With each of the Job Ring available as a platform device, the
Job Ring driver needs to take care of allocation/deallocation
of the Job Rings to the above interface layers. Added APIs
in Job Ring Driver to allocate/free Job rings
Signed-off-by: Ruchika Gupta
Reviewed-by: Garg Vakul-B16394
Signed-off-by: Ruchika Gupta
---
drivers/crypto/caam/ctrl.c | 3 --
drivers/crypto/caam/intern.h | 5
drivers/crypto/caam/jr.c | 67
drivers/crypto/caam/jr.h | 2 --
4 files changed, 77 deletions(-)
diff --git a/drivers/crypto/caam
Remove the dependency of RNG instantiation on Job Ring. Now
RNG instantiation for devices with RNG version > 4 is done
by directly programming DECO 0.
Signed-off-by: Ruchika Gupta
---
drivers/crypto/caam/ctrl.c | 74 ++
drivers/crypto/caam/regs.h |
y been instantiated by
u-boot or boot ROM code.In such SoCs, if RNG is initialized again
SEC would returns "Instantiation error". Hence, the initialization
status of RNG4 should be also checked before doing RNG init.
Signed-off-by: Ruchika Gupta
Signed-off-by: Alex Porosanu
Signed-off-
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