> > + ret = clk_set_rate(qce->core_src, 1);
>
> Could you point me from where you got this number?
I got it from codeaurora qce driver:
https://android.googlesource.com/kernel/msm/+/android-msm-hammerhead-3.4-kk-r1/drivers/crypto/msm/qce50.c#3386
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On Wed, Sep 07, 2016 at 04:04:01PM +0300, Stanimir Varbanov wrote:
> Hi Iaroslav,
>
> On 09/03/2016 07:45 PM, Iaroslav Gridin wrote:
> > Without that, QCE performance is about 2x less.
>
> On which platform? The clock rates are per SoC.
Dragonboard 8074. Should clock ra
Without that, QCE performance is about 2x less.
Signed-off-by: Iaroslav Gridin
---
drivers/crypto/qce/core.c | 18 +-
drivers/crypto/qce/core.h | 2 +-
2 files changed, 18 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/qce/core.c b/drivers/crypto/qce/core.c
index
From: Voker57
Current code avoids supplying scatterlist containing more data than used
to DMA. This leads to dropping data from scatterlists which would
leave some for next run.
Signed-off-by: Iaroslav Gridin
---
drivers/crypto/qce/sha.c | 2 --
1 file changed, 2 deletions(-)
diff --git a
From: Voker57
Zero-sized updates lock QCE, so ensure there's always some data left
for the final update, up to blocksize.
Signed-off-by: Iaroslav Gridin
---
drivers/crypto/qce/sha.c | 30 --
1 file changed, 20 insertions(+), 10 deletions(-)
diff --git a/dr
From: Voker57
If total data amount to hash is zero, we cannot submit it to QCE,
since it locks up on zero-sized updates. So, return pre-computed
SHA256/SHA1 hash.
Signed-off-by: Iaroslav Gridin
---
drivers/crypto/qce/sha.c | 27 ---
1 file changed, 24 insertions(+), 3
From: Voker57
Calling QCE finalization when hash have already been finalized causes
a lockup. Avoid it by introducing finalized flag.
Signed-off-by: Iaroslav Gridin
---
drivers/crypto/qce/sha.c | 6 ++
drivers/crypto/qce/sha.h | 1 +
2 files changed, 7 insertions(+)
diff --git a/drivers
This set of patches fixes QCE digest code, preventing lockups and incorrect
results.
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