Has anyone seen the following problem on Linux 3.10, or later Linux?
If it is fixed, can anyone point out where the fix is?
Thanks.
Chemin
We are running Android, based on Linux3.10.
With our crypto hardware accelerator, and driver, algorithm of
"authenc(hmac(sha1),cbc(aes))" is running well.
Wit
Herbert:
Did anyone report problem on the area of authen(hmac(sha1), cbc(aes)) fallback,
since linux 3-10?
I am working on android linux 3-10.
Our hardware does not support aes 192.
I am following the example from picoxcell_crypto.c. In the cra_init, driver
does the following to allocate
a fal
er message
once we have different cores assigned to crypto irq affinity.
Thanks.
Chemin
-Original Message-
From: Herbert Xu [mailto:herb...@gondor.apana.org.au]
Sent: Monday, June 02, 2014 8:47 AM
To: Hsieh, Che-Min
Cc: linux-crypto@vger.kernel.org; net...@vger.kernel.org; Steffen Klasse
Hi! Herbert:
In a system of multi cpu core, with multiple crypto hardware, different irq
for each, is it possible the udp receive get out of order for the same tfm?
Let us say, of the same tfm, driver distributes requests to any available
crypto hardware. For the same tfm, driver re-sequenc
Herbert:
It is nice to know that the request queue is per tfm. We are currently on
android-3.10. I believe all the drivers under drivers/crypto/ don't follow
this rule. At the minimum, our driver qcrypto does not. Other than
backlogging function, does it break anything? How critical is it
Herbert:
Can you confirm the following. Thanks.
Rfc2404 - The Use of HMAC-SHA-1-96 within ESP and AH
For the support, I can't find any algorithm to be specified in the .craname of
ahash_alg for Rfc2404.
From
http://www.freebsd.org/cgi/man.cgi?query=setkey&sektion=8
it says the follo
ation context,
instead of tfm context. Right?
Thanks.
Chemin
-Original Message-
From: linux-crypto-ow...@vger.kernel.org
[mailto:linux-crypto-ow...@vger.kernel.org] On Behalf Of Marcelo Cerri
Sent: Monday, August 12, 2013 9:49 AM
To: Herbert Xu
Cc: Hsieh, Che-Min; Garg
people doing that (including us).
Cheers,
Chemin
-Original Message-----
From: Herbert Xu [mailto:herb...@gondor.apana.org.au]
Sent: Friday, August 09, 2013 9:21 PM
To: Hsieh, Che-Min
Cc: Marcelo Cerri; linux-crypto@vger.kernel.org
Subject: Re: Questions about the Crypto API
On Thu, Aug 08, 2013 at 02:04
Thanks for Marcelo and Herbert for the questions and answers.
I have a few more questions related to the same subject of API.
1. In the crypto_async_request, is the list element available to the driver
to use? I see most of drivers do "crypto_enqueue_request()" to keep track of
the outstandin
sequence numbers falling
outside the anti-reply window on a peer gateway.
Signed-off-by: Kim Phillips
Signed-off-by: Herbert Xu
-Original Message-
From: Kim Phillips [mailto:kim.phill...@freescale.com]
Sent: Friday, April 05, 2013 6:33 PM
To: Hsieh, Che-Min
Cc: linux-crypto
If a driver supports multiple instances of HW crypto engines, the order of the
request completion from HW can be different from the order of requests
submitted to different HW. The 2nd request sent out to the 2nd HW instance may
take shorter time to complete than the first request for different
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