o take the mtd patches through the MTD
tree. As you've probably noticed, nand code has been moved around and
it's easier for me to carry those 2 simple changes in my tree than
creating an immutable branch.
Let me know if this is a problem.
Regards,
Boris
--
Boris Brezillon, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
On Fri, 16 Feb 2018 11:44:49 +0100
Boris Brezillon wrote:
> Free Electrons is now Bootlin.
>
> Signed-off-by: Boris Brezillon
> ---
> Note that I'm planning to take this patch through the MTD tree.
Applied to the nand/next branch of the MTD tree.
>
On Fri, 16 Feb 2018 16:35:27 +0100
Kamil Konieczny wrote:
> On 16.02.2018 15:54, Boris Brezillon wrote:
> > Adding back all the people that were Cc-ed on the initial email.
> >
> > On Fri, 16 Feb 2018 15:18:21 +0100
> > Kamil Konieczny wrote:
> >
> >
Adding back all the people that were Cc-ed on the initial email.
On Fri, 16 Feb 2018 15:18:21 +0100
Kamil Konieczny wrote:
> On 16.02.2018 15:00, Boris Brezillon wrote:
> > On Fri, 16 Feb 2018 12:21:53 +0100
> > Kamil Konieczny wrote:
> >
> >> On 16.02.201
Free Electrons is now Bootlin.
Signed-off-by: Boris Brezillon
---
Note that I'm planning to take this patch through the MTD tree.
---
.mailmap| 7 ---
MAINTAINERS | 10 +-
2 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/.mailmap b/.mailmap
index e18cab7
Hi Christoph,
On Wed, 10 Jan 2018 16:48:17 +0100
Christoph Hellwig wrote:
> On Wed, Jan 10, 2018 at 04:25:22PM +0100, Boris Brezillon wrote:
> > On Wed, 10 Jan 2018 15:15:43 +
> > Robin Murphy wrote:
> >
> > > phys_to_dma() is an internal helper for c
didn't exist when the offending code was first merged, but it does now.
>
> Signed-off-by: Robin Murphy
Acked-by: Boris Brezillon
> ---
>
> Found by inspection and compile-tested only
>
> drivers/crypto/marvell/cesa.c | 19 ---
> 1 file changed, 1
Hi Herbert,
On Sat, 4 Nov 2017 00:38:26 +0800
kbuild test robot wrote:
> tree:
> https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git
> master
> head: 7a373fd74a8d1c4882e0236cc38345cec1393505
> commit: 7b0c3d693ce65900dd3c79766185f539fa37a29a [125/166] crypto: marvell
struct platform_device_id should be NULL terminated to let the core detect
where the last entry is.
Fixes: 07c50a8be41a ("crypto: marvell - Add a platform_device_id table")
Signed-off-by: Boris Brezillon
---
drivers/crypto/marvell/cesa.c | 1 +
1 file changed, 1 insertion(+)
di
On Fri, 13 Oct 2017 15:30:32 +0200
Boris Brezillon wrote:
> crypto_alg is not supposed to be directly implemented by crypto engine
> driver. Drivers should instead implement specialized interfaces like
*drivers.
> ahash_alg or skcipher_alg.
>
> Migrate to all cipher al
internal struct
or function names.
Signed-off-by: Boris Brezillon
---
drivers/crypto/marvell/cesa.c | 10 +-
drivers/crypto/marvell/cesa.h | 25 ++-
drivers/crypto/marvell/cipher.c | 476
3 files changed, 251 insertions(+), 260 deletions(-)
diff
-by: Boris Brezillon
---
drivers/crypto/Kconfig| 22 +-
drivers/crypto/Makefile |1 -
drivers/crypto/marvell/cesa.c |7 -
drivers/crypto/mv_cesa.c | 1216 -
drivers/crypto/mv_cesa.h | 150 -
5 files changed, 3
e, so, if this series is accepted it will have to go through
a single tree (either ARM or crypto).
Regards,
Boris
Boris Brezillon (3):
crypto: marvell - Add a platform_device_id table
ARM: configs: Stop selecting the old CESA driver
crypto: marvell - Remove the old mv_cesa driver
arch/arm/co
Add a platform_device_id table to allow using this driver on orion
platforms that have not been converted to DT.
Signed-off-by: Boris Brezillon
---
drivers/crypto/marvell/cesa.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/crypto/marvell/cesa.c b/drivers/crypto/marvell
A new driver has been developed to support the CESA IP. Switch
remaining users of the old driver to the new driver in order to remove
the old one.
Signed-off-by: Boris Brezillon
---
arch/arm/configs/dove_defconfig | 2 +-
arch/arm/configs/multi_v5_defconfig | 2 +-
arch/arm/configs
Hi Romain,
May I ask why you're sending this patch to the MTD ML?
While I'm here, can you have a look at this patch [1] and add you
Reviewed-by/Tested-by?
Thanks,
Boris
[1]http://patchwork.ozlabs.org/patch/821959/
On Fri, 6 Oct 2017 17:51:08 +0200
Romain Izard wrote:
> Certain cipher modes
Le Mon, 14 Aug 2017 18:21:14 +0300,
Gilad Ben-Yossef a écrit :
> Now that -EBUSY return code only indicates backlog queueing
> we can safely remove the now redundant check for the
> CRYPTO_TFM_REQ_MAY_BACKLOG flag when -EBUSY is returned.
>
> Signed-off-by: Gilad Ben-Yossef
On Fri, 19 May 2017 08:53:26 +0200
Corentin Labbe wrote:
> This patch simply replace all occurrence of HMAC IPAD/OPAD value by their
> define.
>
> Signed-off-by: Corentin Labbe
Acked-by: Boris Brezillon
> ---
> drivers/crypto/marvell/hash.c | 5 +++--
> 1 file change
: Romain Perier
> Cc:
Just a minor comment (see below), otherwise
Acked-by: Boris Brezillon
> ---
> drivers/crypto/marvell/cesa.h | 3 ++-
> drivers/crypto/marvell/hash.c | 29 -
> drivers/crypto/marvell/tdma.c | 9 -
> 3 files chan
On Fri, 2 Dec 2016 17:05:50 +0100
Romain Perier wrote:
> No need to copy the template of an hash operation twice into the SRAM
> from the step function.
>
> Fixes: commit 85030c5168f1 ("crypto: marvell - Add support for chai...")
> Signed-off-by: Romain Perier
On Fri, 2 Dec 2016 17:05:50 +0100
Romain Perier wrote:
> No need to copy the template of an hash operation twice into the SRAM
> from the step function.
>
> Fixes: commit 85030c5168f1 ("crypto: marvell - Add support for chai...")
> Signed-off-by: Romain Perier
Oh, and please add
Cc:
to bot
On Fri, 2 Dec 2016 17:05:51 +0100
Romain Perier wrote:
> mv_cesa_hash_std_step always copies creq->state into the SRAM. If an IRQ
> is triggered while the current STD request is not finished, this request
> will be stepped again and the initial state will be filled into the
> engine.
Hm, it's n
gt; level.
> The 'complete' operation is also updated to retrieve the MAC digest from the
> right location.
>
> Signed-off-by: Romain Perier
Minor comments below, otherwise it looks good.
Acked-by: Boris Brezillon
> ---
>
> Changes in v4:
> - Remove the dummy
On Tue, 4 Oct 2016 14:57:20 +0200
Romain Perier wrote:
> Currently, the driver breaks chain for all kind of hash requests in order to
> don't override intermediate states of partial ahash updates. However, some
> final
> ahash requests can be directly processed by the engine, and so without
> i
_ERR(tdma))
> return PTR_ERR(tdma);
>
> - iv = dma_pool_alloc(cesa_dev->dma->iv_pool, gfp_flags, &dma_handle);
> - if (!iv)
> - return -ENOMEM;
Can you add a comment explaining what you're doing here?
/* We re-use
() does the same thing)
>
> This removes the call to irq_of_parse_and_map() and checks for
> the error code correctly.
>
> Signed-off-by: Arnd Bergmann
Acked-by: Boris Brezillon
> ---
> drivers/crypto/mv_cesa.c | 7 ++-
> 1 file changed, 2 insertions(+), 5 delet
On Thu, 18 Aug 2016 14:12:14 +0200
Romain Perier wrote:
> Currently, the driver breaks chain for all kind of hash requests in order
> to don't override intermediate states of partial ahash updates. However,
> some final ahash requests can be directly processed by the engine, and
> so without inte
Hi Romain,
On Thu, 18 Aug 2016 14:12:13 +0200
Romain Perier wrote:
> So far, we used a dedicated dma pool to copy the result of outer IV for
> cipher requests. Instead of using a dma pool per outer data, we prefer
> use a common dma pool that contains the part of the SRAM that is likely
> to be
y is already done in the _complete operation, so this commit removes
> the duplicated code in the _process op.
>
> Fixes: 3610d6cd5231 ("crypto: marvell - Add a complete...")
> Signed-off-by: Romain Perier
Acked-by: Boris Brezillon
> ---
> drivers/crypto/marvell/cip
ete operation for..")
> Signed-off-by: Romain Perier
Acked-by: Boris Brezillon
> ---
> drivers/crypto/marvell/hash.c | 12 ++--
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/crypto/marvell/hash.c b/drivers/crypto/marvell/hash.c
&g
f the return status to be sure that the current request has been
> correctly queued or added to the backlog.
>
> Fixes: 85030c5168f1 ("crypto: marvell - Add support for chaining...")
> Signed-off-by: Romain Perier
Acked-by: Boris Brezillon
> ---
> drivers/crypto/marv
function is called with the wrong version of the chain.
>
> Fixes: db509a45339f ("crypto: marvell/cesa - add TDMA support")
> Signed-off-by: Romain Perier
Acked-by: Boris Brezillon
> ---
> drivers/crypto/marvell/cipher.c | 14 ++
> 1 file changed, 6 inserti
On Mon, 18 Jul 2016 11:32:24 +0200
Romain Perier wrote:
> Use the parameter 'gfp_flags' instead of 'flag' as second argument of
> dma_pool_alloc(). The parameter 'flag' is for the TDMA descriptor, its
> content has no sense for the allocator.
>
> S
processed by the engine.
>
> This commits re-factorizes the code, changes the code architecture and
> adds the required data structures to chain cryptographic requests
> together before sending them to an engine (stopped or possibly already
> running).
>
> Signed-off-by: Romain Perie
7;cesa_dev->lock' and improve parallelism.
>
> Signed-off-by: Romain Perier
Acked-by: Boris Brezillon
> ---
>
> Changes in v3:
>
> - Renamed mv_cesa_dequeue_req_unlocked => mv_cesa_dequeue_req_locked
>
> Changes in v2:
>
> - Reworded the commit m
from sending asychronous requests, so more cryptographic tasks
> are processed by the engines.
>
> Signed-off-by: Romain Perier
Acked-by: Boris Brezillon
> ---
> drivers/crypto/marvell/cesa.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/cr
On Fri, 17 Jun 2016 13:24:08 +0200
Romain Perier wrote:
> The Cryptographic Engines and Security Accelerators (CESA) supports the
> Multi-Packet Chain Mode. With this mode enabled, multiple tdma requests
> can be chained and processed by the hardware without software
> intervention. This mode was
On Fri, 17 Jun 2016 13:24:07 +0200
Romain Perier wrote:
> This commits adds support for fine grained load balancing on
> multi-engine IPs. The engine is pre-selected based on its current load
> and on the weight of the crypto request that is about to be processed.
> The global crypto queue is als
st while the engine is running.
>
> Signed-off-by: Romain Perier
Acked-by: Boris Brezillon
> ---
> drivers/crypto/marvell/cipher.c | 6 +++---
> drivers/crypto/marvell/hash.c | 18 +-
> 2 files changed, 12 insertions(+), 12 deletions(-)
>
> diff --git
t to call
> the process and the complete operations from different locations
> depending on the type of the request (different cleanup logic).
>
> Signed-off-by: Romain Perier
Acked-by: Boris Brezillon
> ---
>
> Changes in v2:
>
> - Removed useless cosmetic ch
eq
> to mv_cesa_ablkcipher_req directly. There are also no needs to keep the
> 'base' field into the union of mv_cesa_ahash_req, so move it into the
> upper structure.
>
> Signed-off-by: Romain Perier
Acked-by: Boris Brezillon
> ---
>
> Changes in v2:
> -
required for processing multiple cipher requests
> in chained mode, otherwise the content of the IV vector would be
> overwritten by the last processed request.
>
> Signed-off-by: Romain Perier
After fixing the coding style issue,
Acked-by: Boris Brezillon
> ---
>
> Changes
On Fri, 17 Jun 2016 13:24:02 +0200
Romain Perier wrote:
> So far, the way that the type of a TDMA operation was checked was
> wrong. We have to use the type mask in order to get the right part of
> the flag containing the type of the operation.
>
> Signed-off-by: Romain Perier
let the user know that something went wrong in the CESA
> driver.
>
> Signed-off-by: Romain Perier
Acked-by: Boris Brezillon
> ---
>
> Changes in v2:
> - Reworded the commit message
> - Fixed cosmetic changes
>
> drivers/crypto/marvell/cipher.c | 2
-off-by: Romain Perier
You forgot
Acked-by: Boris Brezillon
> ---
> drivers/crypto/marvell/cesa.c | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/crypto/marvell/cesa.c
> b/drivers/crypto/marvell/cesa.c index 056a754..fb403e1 100644
> --- a/d
r_std_req and
mv_cesa_req base in mv_cesa_ablkcipher_req (you'll also have to remove
the base field from the mv_cesa_ablkcipher_std_req struct).
--
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
--
To unsubscribe from this list: s
ch will always be
false, since mv_cesa_ahash_dma_req_init() is the function supposed to
fill the ->first and ->last fields.
> >
> > Should be
> >
> > if (cesa_dev->caps->has_tdma)
> >
> >>ret = mv_cesa_ahash_dma_req_init(req);
&
ne,
> + &backlog);
> +
> + /* Re-chaining to the next request */
> + engine->chain.first = tdma->next;
> + tdma->next = NULL;
> +
> +
,8 @@ static void mv_cesa_ahash_std_prepare(struct
> ahash_request *req)
> {
> struct mv_cesa_ahash_req *creq = ahash_request_ctx(req);
> struct mv_cesa_ahash_std_req *sreq = &creq->req.std;
> - struct mv_cesa_engine *engine = sreq->base.engine;
>
> sreq->off
int digsize;
> + int i;
>
> digsize = crypto_ahash_digestsize(crypto_ahash_reqtfm(ahashreq));
> for (i = 0; i < digsize / 4; i++)
> @@ -326,8 +329,6 @@ static int mv_cesa_ahash_process(struct
> crypto_async_request *req, u32 status)
>
memcpy_fromio(ablkreq->info, dreq->chain.last->data, ivsize);
Just use memcpy() here: you're not copying from an iomem region here.
--
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
--
To unsubscribe from this list: s
eq)
> if (cached)
> return 0;
>
> - ret = mv_cesa_queue_req(&req->base);
> + ret = mv_cesa_queue_req(&req->base, &creq->req.base);
> if (mv_cesa_req_needs_cleanup(&req->base, ret))
> mv_cesa_ahash_cleanup(
_dma_add_desc(chain, gfp_flags);
> + if (IS_ERR(tdma))
> + return PTR_ERR(tdma);
> +
> + cache = dma_pool_alloc(cesa_dev->dma->iv_pool, flags, &dma_handle);
> + if (!cache)
> + return -ENOMEM;
> +
> + tdma->byte_cnt
ier
Apart from the coding style issue mentioned below,
Acked-by: Boris Brezillon
> ---
> drivers/crypto/marvell/cipher.c | 2 ++
> drivers/crypto/marvell/hash.c | 2 ++
> drivers/crypto/marvell/tdma.c | 2 ++
> 3 files changed, 6 insertions(+)
>
> diff --git a/drive
-off-by: Romain Perier
Acked-by: Boris Brezillon
> ---
> drivers/crypto/marvell/cesa.c | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/crypto/marvell/cesa.c b/drivers/crypto/marvell/cesa.c
> index 056a754..fb403e1 100644
> --- a/drivers/c
;
> @@
>
> d =
> -dma_pool_alloc
> +dma_pool_zalloc
> (...);
> if (!d) S
> - memset(d, 0, sizeof(*d));
> //
>
> Signed-off-by: Julia Lawall
Acked-by: Boris Brezillon
>
> ---
>
> drivers/crypto/marvell/t
ot; by "engine" and in order to improve
> readability.
>
> Signed-off-by: Romain Perier
Acked-by: Boris Brezillon
> ---
> drivers/crypto/marvell/cesa.c | 10 +-
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/crypto/marvell/cesa.c
On Mon, 4 Apr 2016 13:44:11 +0530
Vignesh R wrote:
> Hi,
>
> On 03/31/2016 05:59 PM, Boris Brezillon wrote:
> > Add an helper to check if a virtual address is in the highmem region.
> >
> > Signed-off-by: Boris Brezillon
> > ---
> > include/linux/h
Hi Russell,
On Thu, 31 Mar 2016 15:14:13 +0100
Russell King - ARM Linux wrote:
> On Thu, Mar 31, 2016 at 02:29:42PM +0200, Boris Brezillon wrote:
> > sg_alloc_table_from_buf() provides an easy solution to create an sg_table
> > from a virtual address pointer. This function takes
Some NAND controller drivers are making use of DMA to transfer data from
the controller to the buffer passed by the MTD user.
Provide a generic mtd_map/unmap_buf() implementation to avoid open coded
(and sometime erroneous) implementations.
Signed-off-by: Boris Brezillon
---
drivers/mtd
Add an helper to check if a virtual address is in the highmem region.
Signed-off-by: Boris Brezillon
---
include/linux/highmem.h | 13 +
1 file changed, 13 insertions(+)
diff --git a/include/linux/highmem.h b/include/linux/highmem.h
index bb3f329..13dff37 100644
--- a/include/linux
sg_alloc_table_from_buf() provides an easy solution to create an sg_table
from a virtual address pointer. This function takes care of dealing with
vmallocated buffers, buffer alignment, or DMA engine limitations (maximum
DMA transfer size).
Signed-off-by: Boris Brezillon
---
include/linux
Replace custom implementation of sg_alloc_table_from_buf() by a call to
sg_alloc_table_from_buf().
Signed-off-by: Boris Brezillon
---
drivers/spi/spi.c | 45 +
1 file changed, 5 insertions(+), 40 deletions(-)
diff --git a/drivers/spi/spi.c b/drivers
ven if they're not directly impacted by those patches. Let me know if
you want me to drop/add people from/to the recipient list.
Thanks.
Best Regards,
Boris
[1]http://www.spinics.net/lists/arm-kernel/msg493552.html
Boris Brezillon (4):
mm: add is_highmem_addr() helper
scatterlist: add
On Mon, 21 Mar 2016 12:03:43 +0300
Dan Carpenter wrote:
> creq->cache[] is an array inside the struct, it's not a pointer and it
> can't be NULL.
>
> Signed-off-by: Dan Carpenter
Acked-by: Boris Brezillon
>
> diff --git a/drivers/crypto/marvell/hash.c
Forward devm_ioremap_resource() error code instead of returning
-ENOMEM.
Signed-off-by: Boris Brezillon
Reported-by: Russell King - ARM Linux
Fixes: f63601fd616a ("crypto: marvell/cesa - add a new driver for Marvell's
CESA")
Cc: # 4.2+
---
drivers/crypto/marvell/cesa.c | 2 +-
Sorry for the noise, just sent twice the same patch :-/.
Please ignore this one.
On Thu, 17 Mar 2016 10:47:11 +0100
Boris Brezillon wrote:
> Forward devm_ioremap_resource() error code instead of returning
> -ENOMEM.
>
> Signed-off-by: Boris Brezillon
> Reported-by: Russell K
On Thu, 17 Mar 2016 10:21:34 +0100
Boris Brezillon wrote:
> Crypto requests are not guaranteed to be finalized (->final() call),
> and can be freed at any moment, without getting any notification from
> the core. This can lead to memory leaks of the ->cache buffer.
>
> Mak
Forward devm_ioremap_resource() error code instead of returning
-ENOMEM.
Signed-off-by: Boris Brezillon
Reported-by: Russell King - ARM Linux
Fixes: f63601fd616a ("crypto: marvell/cesa - add a new driver for Marvell's
CESA")
Cc: # 4.2+
---
drivers/crypto/marvell/cesa.c | 2 +-
On Fri, 18 Mar 2016 11:25:48 +
Robin Murphy wrote:
> On 18/03/16 09:30, Boris Brezillon wrote:
> > On Thu, 17 Mar 2016 23:50:20 +
> > Russell King - ARM Linux wrote:
> >
> >> On Thu, Mar 17, 2016 at 07:17:24PM -0400, ok...@codeaurora.org wrote:
> >
On Fri, 18 Mar 2016 09:51:37 -0400
Sinan Kaya wrote:
> On 3/18/2016 7:25 AM, Robin Murphy wrote:
> > On 18/03/16 09:30, Boris Brezillon wrote:
> >> On Thu, 17 Mar 2016 23:50:20 +
> >> Russell King - ARM Linux wrote:
> >>
> >>> On Thu, Mar 17
mory which isn't a struct
> page, ultimately resulting in something that isn't SRAM being pointed
> to by "engine->sram_dma".
>
Or we could just do
engine->sram_dma = res->start;
which is pretty much what the SRAM/genalloc code is doing already.
--
Bo
->export() might be called before we have done an update operation,
and in this case the ->state field is left uninitialized.
Put the correct default value when initializing the request.
Signed-off-by: Boris Brezillon
---
drivers/crypto/marvell/hash.c | 20
1 file c
n the meantime, thus leading to an invalind dma_pool_free()
call (the buffer passed in argument has not been allocated from the pool).
Signed-off-by: Boris Brezillon
Reported-by: Gregory CLEMENT
---
drivers/crypto/marvell/cesa.h | 3 +-
drivers/crypto/marve
We are checking twice if dma->cache_pool is not NULL but are never testing
dma->padding_pool value.
Signed-off-by: Boris Brezillon
---
drivers/crypto/marvell/cesa.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/marvell/cesa.c b/drivers/crypto/marvell/
opriate sparse warnings should be fixed without penalising code.)
To the whole series:
Acked-by: Boris Brezillon
>
> drivers/crypto/marvell/cesa.h | 44
> -
> drivers/crypto/marvell/cipher.c | 13 ++--
> drivers/cr
he same.
>
> Unfortunately, this is a large series, but the driver unfortunately
> needs this level of bug fixing to work properly.
Thanks for spending some time fixing those bugs and
simplifying/factorizing/documenting the hash logic.
To the whole series:
Acked-by: Boris Brezillon
No
The only other place is
> in the marvell cesa driver itself when initialising the hmac state.
>
> Is there any reason a driver can't define its own structure to be
> exported here which can be shared between each of the different methods
> it supports?
>
> Thanks.
>
sh_prepare_alg(struct shash_alg *alg)
>
> if (alg->digestsize > PAGE_SIZE / 8 ||
> alg->descsize > PAGE_SIZE / 8 ||
> - alg->statesize > PAGE_SIZE / 8)
> + alg->statesize > PAGE_SIZE / 8 ||
> + alg->statesize == 0)
&
e_ptr;
> - int ret;
> -
> - ret = crypto_ahash_init(req);
> - if (ret)
> - return ret;
> -
> - if (in_state->count >= SHA256_BLOCK_SIZE)
> - mv_cesa_update_op_cfg(&creq->op_tmpl,
> - CESA_SA_DE
+ Fixes tags to patches 1 to 4 so that they
can be applied on 4.2 too?
Best Regards,
Boris
--
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
--
To unsubscribe from this list: send the line "unsubscribe linux-crypto" in
the body of a message
256_BLOCK_SIZE)
> - mv_cesa_update_op_cfg(&creq->op_tmpl,
> - CESA_SA_DESC_CFG_MID_FRAG,
> - CESA_SA_DESC_CFG_FRAG_MSK);
> -
> - creq->len = in_state->count;
> - memcpy(creq->sta
sa_update_op_cfg(&creq->op_tmpl,
> + CESA_SA_DESC_CFG_MID_FRAG,
> + CESA_SA_DESC_CFG_FRAG_MSK);
> +
> creq->len = in_state->count;
> memcpy(creq->state, in_state->state, digsize);
>
t with
> whatever data was in memory prior to sock_kmalloc().
>
> Add zero-initialisation of this structure.
Maybe you should also change your commit message since this patch no
longer initializes the req struct to zero, otherwise
Acked-by: Boris Brezillon
>
> Signed-off-by: Russell King
ers which are left with
> whatever data was in memory prior to sock_kmalloc().
>
> Add zero-initialisation of this structure.
>
> Signed-off-by: Russell King
Acked-by: Boris Brezillon
> ---
> drivers/crypto/marvell/hash.c | 6 ++
> 1 file changed, 6 insertions(+)
&
te" etc. Add the necessary initialisers for the
> .statesize member.
>
> Signed-off-by: Russell King
Acked-by: Boris Brezillon
> ---
> drivers/crypto/marvell/hash.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/crypto/marvell/hash.c b/driv
rt function writes. This patch is
> > optional.
> >
> > The second patch adds the necessary statesize members to the Marvell
> > code which were previously missing. Fixing this uncovered a further
> > problem, which the third patch addresses.
>
Thanks again for spending some of your time debugging the driver and for
providing those patches.
Best Regards,
Boris
--
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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relevant developers to the list of maintainers.
>
> Cc: Boris Brezillon
Acked-by: Boris Brezillon
Thanks,
Boris
> Cc: Arnaud Ebalard
> Cc: Herbert Xu
> Cc: Russell King
> Signed-off-by: Thomas Petazzoni
> ---
> MAINTAINERS | 7 +++
> 1 file changed, 7 ins
b509a45339fd ("crypto: marvell/cesa - add TDMA support")
> Cc: # v4.2+
> Signed-off-by: Thomas Petazzoni
Acked-by: Boris Brezillon
> ---
> drivers/crypto/marvell/cesa.h | 27 +++
> drivers/crypto/marvell/cipher.c | 7 +
On Fri, 10 Jul 2015 14:46:16 +0900
Krzysztof Kozlowski wrote:
> platform_driver does not need to set an owner because
> platform_driver_register() will set it.
>
> Signed-off-by: Krzysztof Kozlowski
Acked-by: Boris Brezillon
>
> ---
>
> The coccinelle script which
On Fri, 3 Jul 2015 10:58:07 +0100
Russell King - ARM Linux wrote:
> On Fri, Jul 03, 2015 at 11:43:05AM +0200, Boris Brezillon wrote:
> > Which led us to think that this could be related to a non cache-line
> > aligned buffer problem: if we share the cache line with someone
> &g
te that none of my patches changed the clk_get(), request_irq() calls
order, or the clk_get() error path ;-).
Anyway, I'll propose a patch fixing the problem.
Thanks for the feedback,
Boris
[1]https://git.kernel.org/cgit/linux/kernel/git/next/linux-next.git/commit/drivers/crypto/mv_cesa.c
g else we should check ?
Best Regards,
Boris
--
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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Mo
Hi Herbert,
On Sun, 21 Jun 2015 16:27:17 +0800
Herbert Xu wrote:
> On Sun, Jun 21, 2015 at 10:24:18AM +0200, Boris Brezillon wrote:
> >
> > Indeed. Here is a patch fixing that.
>
> I think you should just kill COMPILE_TEST instead of adding ARM.
The following
Hi Herbert,
On Sun, 21 Jun 2015 16:27:17 +0800
Herbert Xu wrote:
> On Sun, Jun 21, 2015 at 10:24:18AM +0200, Boris Brezillon wrote:
> >
> > Indeed. Here is a patch fixing that.
>
> I think you should just kill COMPILE_TEST instead of adding ARM.
Okay, I guess I should
Hi Paul,
On Sat, 20 Jun 2015 20:14:08 -0400
Paul Gortmaker wrote:
> On Sat, Jun 20, 2015 at 4:32 PM, Paul Gortmaker
> wrote:
> > On Fri, Jun 19, 2015 at 10:24 AM, Herbert Xu
> > wrote:
> >> On Thu, Jun 18, 2015 at 03:46:16PM +0200, Boris Brezillon wrote:
> >
From: Arnaud Ebalard
Add support for SHA256 operations.
Signed-off-by: Arnaud Ebalard
Signed-off-by: Boris Brezillon
---
drivers/crypto/marvell/cesa.c | 2 +
drivers/crypto/marvell/cesa.h | 2 +
drivers/crypto/marvell/hash.c | 159 ++
3 files
their crypto engine device
to this driver.
Signed-off-by: Boris Brezillon
---
Documentation/devicetree/bindings/crypto/mv_cesa.txt | 5 -
drivers/crypto/mv_cesa.c | 4 +++-
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree
.
Also note that the old way of retrieving the SRAM memory region is still
supported, or in other words, backward compatibility is preserved.
Signed-off-by: Boris Brezillon
---
.../devicetree/bindings/crypto/mv_cesa.txt | 24 ++---
drivers/crypto/Kconfig
commit introduce the base infrastructure allowing us to add support
for DMA optimization.
It also includes support for one hash (SHA1) and one cipher (AES)
algorithm, and enable those features on the Armada 370 SoC.
Other algorithms and platforms will be added later on.
Signed-off-by: Boris Brezillon
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