Fix to return negative error code -ENOMEM from the error handling
case instead of 0, as done elsewhere in this function.
Fixes: 885743324513 ("crypto: keembay - Add support for Keem Bay OCS AES/SM4")
Reported-by: Hulk Robot
Signed-off-by: Wei Yongjun
---
drivers/crypto/keembay/keembay-ocs-aes-c
Fix to return negative error code -ENOMEM from the error handling
case instead of 0, as done elsewhere in this function.
Fixes: 472b0cd3 ("crypto: keembay - Add Keem Bay OCS HCU driver")
Reported-by: Hulk Robot
Signed-off-by: Wei Yongjun
---
drivers/crypto/keembay/keembay-ocs-hcu-core.c | 4
On Sun, Feb 07, 2021 at 10:39:05AM +0800, Tian Tao wrote:
> Use devm_hwrng_register to get rid of manual unregistration.
>
> Signed-off-by: Tian Tao
> ---
> drivers/char/hw_random/timeriomem-rng.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
Patch applied. Thanks.
--
Email: Herbe
On Thu, Feb 04, 2021 at 05:00:24PM +0800, Hui Tang wrote:
> Enable x25519/x448/ecdh/ecdsa/sm2 algorithm on Kunpeng 930.
>
> Signed-off-by: Hui Tang
> ---
> drivers/crypto/hisilicon/hpre/hpre_main.c | 9 -
> 1 file changed, 8 insertions(+), 1 deletion(-)
Patch applied. Thanks.
--
Email
On Thu, Feb 04, 2021 at 04:59:32PM +0800, Hui Tang wrote:
> 1.Update clusters number for both Kunpeng920 and Kunpeng930.
> 2.Some bugfixs only on Kunpeng920, so added hardware version wrap.
> 3.Fix use of 'dma_map_single'.
> 4.Fix PASID on Kunpeng930.
>
> Hui Tang (2):
> crypto: hisilicon/hpre -
On Thu, Feb 04, 2021 at 04:42:15PM +0100, Arnd Bergmann wrote:
> From: Arnd Bergmann
>
> When CONFIG_CPUMASK_OFFSTACK is disabled, clang reports a warning
> about a bogus condition:
>
> drivers/crypto/marvell/octeontx2/otx2_cptlf.c:334:21: error: address of array
> 'lfs->lf[slot].affinity_mask'
On Fri, Feb 05, 2021 at 06:12:52PM +0800, Weili Qian wrote:
> This patchset fixes some bugs:
> 1. Removing the waiting reset's completion logic of driver.
> 2. In order to prevent request missing,
>call user's callback before device resetting.
> 3. Fix the value of 'QM_SQC_VFT_BASE_MASK_V2'.
>
On Thu, Feb 04, 2021 at 07:11:33AM +, Xu Wang wrote:
> Remove casting the values returned by dma_alloc_coherent.
>
> Signed-off-by: Xu Wang
> ---
> drivers/crypto/cavium/cpt/cptvf_main.c | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
Patch applied. Thanks.
--
Email: Herbe
On Wed, Feb 03, 2021 at 03:42:10PM +, Daniele Alessandrelli wrote:
> From: Daniele Alessandrelli
>
> In ocs_aes_ccm_write_b0(), 'q' (the octet length of the binary
> representation of the octet length of the payload) is set to 'iv[0]',
> while it should be set to 'iv[0] & 0x7' (i.e., only the
On Wed, Feb 03, 2021 at 08:26:06PM +0800, Tian Tao wrote:
> Use devm_hwrng_register to get rid of manual unregistration.
>
> Signed-off-by: Tian Tao
> Reviewed-by: Sumit Garg
> ---
> v2:Fix up subject line as s/hwrng: optee -:/hwrng: optee:/
> ---
> drivers/char/hw_random/optee-rng.c | 3 +--
>
On Wed, Feb 03, 2021 at 09:09:33PM +0530, Bhaskar Chowdhury wrote:
>
> s/optimzation/optimization/
>
> Signed-off-by: Bhaskar Chowdhury
> ---
> crypto/xor.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page: http://gondor.apana.org
On Wed, Feb 03, 2021 at 12:36:17PM +0100, Ard Biesheuvel wrote:
> Given how kernel mode NEON code disables preemption (to ensure that the
> FP/SIMD register state is protected without having to context switch it),
> we need to take care not to let those algorithms operate on unbounded
> input data,
On Tue, Feb 02, 2021 at 11:17:30AM +0800, Yang Li wrote:
> Eliminate the following coccicheck warning:
> ./arch/powerpc/crypto/sha256-spe-glue.c:132:2-3: Unneeded
> semicolon
>
> Reported-by: Abaci Robot
> Signed-off-by: Yang Li
> ---
> arch/powerpc/crypto/sha256-spe-glue.c | 2 +-
> 1 file cha
On Wed, Feb 03, 2021 at 11:28:37AM +, Daniele Alessandrelli wrote:
> From: Daniele Alessandrelli
>
> The length ('len' parameter) passed to crypto_ecdh_decode_key() is never
> checked against the length encoded in the passed buffer ('buf'
> parameter). This could lead to an out-of-bounds acce
On Tue, Feb 02, 2021 at 10:06:15AM +0800, Jiapeng Chong wrote:
> Fix the following coccicheck warning:
>
> ./drivers/crypto/caam/debugfs.c:23:0-23: WARNING: caam_fops_u64_ro
> should be defined with DEFINE_DEBUGFS_ATTRIBUTE.
>
> ./drivers/crypto/caam/debugfs.c:22:0-23: WARNING: caam_fops_u32_ro
>
On Mon, Feb 01, 2021 at 04:14:59PM +0100, Jan Henrik Weinstock wrote:
> Ensure cooldown period tolerance of 1% is actually accounted for.
>
> Signed-off-by: Jan Henrik Weinstock
> ---
>
> Before patch, if period_us was less than 100us, no extra sleep time was
> added. If it was more than 100us,
On Mon, Feb 01, 2021 at 07:02:28PM +0100, Ard Biesheuvel wrote:
> Some generic implementations of vintage ciphers rely on alignmasks to
> ensure that the input is presented with the right alignment. Given that
> these are all C implementations, which may execute on architectures that
> don't care a
On Mon, Feb 01, 2021 at 02:44:31PM +0100, Geert Uytterhoeven wrote:
> The Marvell OcteonTX2 CPT physical function PCI device is present only
> on OcteonTx2 SoC, and not available as an independent PCIe endpoint.
> Hence add a dependency on ARCH_THUNDER2, to prevent asking the user
> about this driv
On Sun, Feb 07, 2021 at 09:39:39AM -0500, Thara Gopinath wrote:
>
> + /*
> + * The crypto engine does not support any two keys
> + * being the same for triple des algorithms. The
> + * verify_skcipher_des3_key does not check for all the
> + * below conditions. Return -ENOKEY
This patch fixes the byte order markings in serpent.
Signed-off-by: Herbert Xu
diff --git a/crypto/serpent_generic.c b/crypto/serpent_generic.c
index 236c87547a17..45f98b750053 100644
--- a/crypto/serpent_generic.c
+++ b/crypto/serpent_generic.c
@@ -272,6 +272,7 @@ int __serpent_setkey(struct se
On Thu, Feb 04, 2021 at 11:09:40AM +, Lee Jones wrote:
> This set is part of a larger effort attempting to clean-up W=1
> kernel builds, which are currently overwhelmingly riddled with
> niggly little warnings.
>
> This is set 1 of 2 sets required to fully clean Crypto.
>
> Lee Jones (20):
>
On Sun, Feb 07, 2021 at 06:04:40PM +0800, Longfang Liu wrote:
> If the header file "crypto/internal/hash.h" not
> added, the allocation of crypto_tfm will fail when
> the shash algorithm calculates the hash
> through the software.
>
> Signed-off-by: Longfang Liu
> ---
> drivers/crypto/hisilicon/
On Thu, Feb 04, 2021 at 03:24:13PM +0800, Jiapeng Chong wrote:
> Fix the following coccicheck warning:
>
> ./drivers/crypto/picoxcell_crypto.c:1201:8-16: WARNING: use scnprintf
> or sprintf.
>
> Reported-by: Abaci Robot
> Signed-off-by: Jiapeng Chong
> ---
> drivers/crypto/picoxcell_crypto.c |
On Mon, Feb 08, 2021 at 05:38:55PM +0800, Meng Yu wrote:
> 1. Enable 'ECDH' algorithm in Kunpeng 930;
> 2. HPRE ECDH Support: ecdh-nist-p192, ecdh-nist-p224,
>ecdh-nist-p256, ecdh-nist-p384, ecdh-nist-p521.
Where is the patch that adds the generic ecdh-nist-p384?
Thanks,
--
Email: Herbert Xu
On Mon, Feb 08, 2021 at 05:38:51PM +0800, Meng Yu wrote:
> As curve id of ECDH will be moved from its key into algorithm name,
> we cannot use 'curve_id' in 'struct ecdh', so we should modify ECDH
> driver in atmel, and make ECDH algorithm name be the same as crypto
> (like 'ecdh-nist-pxxx');
>
>
The function meson_crypto_probe() is only called with an openfirmware
platform device. Therefore there is no need to check that the passed
in device is NULL.
Signed-off-by: Tang Bin
---
drivers/crypto/amlogic/amlogic-gxl-core.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/crypto
On 2/9/2021 5:14 PM, Tian Tao wrote:
> clk_prepare_enable() and clk_disable_unprepare() will check
> NULL clock parameter, so It is not necessary to add additional checks.
>
> Signed-off-by: Tian Tao
Acked-by: Florian Fainelli
Thanks for the quick spin!
--
Florian
clk_prepare_enable() and clk_disable_unprepare() will check
NULL clock parameter, so It is not necessary to add additional checks.
Signed-off-by: Tian Tao
---
v2:
change devm_clk_get() to devm_clk_get_optional() which will deal with
-ENOENT and return NULL in that case.
---
drivers/char/hw_rando
Thanks Jakub. Overlooked new warnings as I was using C=2 flag.
Will fix it in the next version.
From: Jakub Kicinski
Sent: Monday, February 8, 2021 11:10 PM
To: Geethasowjanya Akula
Cc: net...@vger.kernel.org; linux-ker...@vger.kernel.org;
linux-crypto@v
On 2/8/21 10:25 PM, Tian Tao wrote:
> clk_prepare_enable() and clk_disable_unprepare() will check
> NULL clock parameter, so It is not necessary to add additional checks.
>
> Signed-off-by: Tian Tao
I don't believe this is going to work unless you also change
devm_clk_get() to devm_clk_get_optio
Am Dienstag, dem 09.02.2021 um 13:35 + schrieb Elena Petrova:
> Hi Stephan,
>
> On Fri, 8 Jan 2021 at 18:57, Stephan Mueller wrote:
> >
> > Am Freitag, dem 08.01.2021 um 17:38 + schrieb Elena Petrova:
> > > NIAP FPT_TST_EXT.1 [1] specification requires testing of a small set of
> > > cry
From: Bhaskar Chowdhury
Trivial fix to spelling mistake in adf_pf2vf_msg.c and adf_vf2pf_msg.c.
s/messge/message/
Signed-off-by: Bhaskar Chowdhury
Signed-off-by: Giovanni Cabiddu
---
drivers/crypto/qat/qat_common/adf_pf2vf_msg.c | 2 +-
drivers/crypto/qat/qat_common/adf_vf2pf_msg.c | 4 ++--
Will be consolidated with the other patch that fixes the same spelling
mistake.
Regards,
--
Giovanni
On Wed, Feb 03, 2021 at 08:31:48PM +0530, Bhaskar Chowdhury wrote:
>
> s/messge/message/ ..two different lines
>
> Signed-off-by: Bhaskar Chowdhury
> ---
> drivers/crypto/qat/qat_common/adf
Thanks.
I'm going to consolidate this with the previous patch, improve the
commit message and resubmit.
Regards,
--
Giovanni
On Wed, Feb 03, 2021 at 08:25:06PM +0530, Bhaskar Chowdhury wrote:
>
> s/messge/message/
>
> Signed-off-by: Bhaskar Chowdhury
> ---
> drivers/crypto/qat/qat_common/a
Use devm_platform_ioremap_resource() to simplify the code.
Signed-off-by: Tian Tao
---
drivers/char/hw_random/xiphera-trng.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/char/hw_random/xiphera-trng.c
b/drivers/char/hw_random/xiphera-trng.c
index 7bdab8c..2a9fea
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