On Tue, Feb 02, 2021 at 02:55:42PM -0600, Rob Herring wrote:
> Running 'dt-validate -m' will flag any compatible strings missing a schema.
> Fix all the errors found in DT binding examples. Most of these are just
> typos.
>
> Cc: Stephen Boyd
> Cc: Maxime Ripard
> Cc: Chen-Yu Tsai
> Cc: Linus W
From: Subbaraya Sundeep
Firmware allocates memory regions for PFs and VFs in DRAM.
The PFs memory region is used for AF-PF and PF-VF mailbox.
This mbox facilitate communication between AF-PF and PF-VF.
On CN10K platform:
The DRAM region allocated to PF is enumerated as PF BAR4 memory.
PF BAR4 co
From: Hariprasad Kelam
RPM supports below list of counters as an extension to existing counters
* class based flow control pause frames
* vlan/jabber/fragmented packets
* fcs/alignment/oversized error packets
This patch adds support to display supported RPM counters via debugfs
and define
From: Hariprasad Kelam
OcteonTx3 CN10K silicon supports bigger MTU when compared
to 9216 MTU supported by OcteonTx2 silicon variants. Lookback
interface supports upto 64K and RPM LMAC interfaces support
upto 16K.
This patch does the necessary configuration and adds support
for PF/VF drivers to r
From: Hariprasad Kelam
CN10K supports max MTU of 16K on LMAC links and 64k on LBK
links and Octeontx2 silicon supports 9K mtu on both links.
Get the same from nix_get_hw_info mbox message in netdev probe.
This patch also calculates receive buffer size required based
on the MTU set.
Signed-off-b
On CN10K platform NIX RQ and SQ context structure got changed.
This patch uses new mbox message "NIX_CN10K_AQ_ENQ" for NIX
context initialization on CN10K platform.
This patch also updates the nix_rx_parse_s and nix_sqe_sg_s
structures to add packet steering bit feilds.
Signed-off-by: Geetha sowj
From: Hariprasad Kelam
OcteonTx2's next gen platform the CN10K has RPM MAC which has a
different serdes when compared to CGX MAC. Though the underlying
HW is different, the CSR interface has been designed largely inline
with CGX MAC, with few exceptions though. So we are using the same
CGX driver
On CN10K platform transmit/receive buffer alloc and free from/to hardware
had changed to support burst operation. Whereas pervious silicon's only
support single buffer free at a time.
To Support the same firmware allocates a DRAM region for each PF/VF for
storing LMTLINES. These LMTLINES are used f
NIX hardware context structure got changed to accommodate new
features like bandwidth steering, L3/L4 outer/inner checksum
enable/disable etc., on CN10K platform.
This patch defines new mbox message NIX_CN10K_AQ_INST for new
NIX context initialization.
This patch also updates the NPA context struc
From: Subbaraya Sundeep
NIX uses unique channel numbers to identify the packet sources/sinks
like CGX,LBK and SDP. The channel numbers assigned to each block are
hardwired in CN9xxx silicon.
The fixed channel numbers in CN9xxx are:
0x0 | a << 8 | b- LBK(0..3)_CH(0..63)
0x0 | a << 8
From: Hariprasad Kelam
MAC on CN10K silicon support loopback for selftest or debug purposes.
This patch does necessary configuration to loopback packets upon receiving
request from LMAC mapped RVU PF's netdev via mailbox.
Also MAC (CGX) on OcteonTx2 silicon variants and MAC (RPM) on
OcteonTx3 CN
The current admin function (AF) driver and the netdev driver supports
OcteonTx2 silicon variants. The same OcteonTx2's
Resource Virtualization Unit (RVU) is carried forward to the next-gen
silicon ie OcteonTx3, with some changes and feature enhancements.
This patch set adds support for OcteonTx3 (
Firmware allocates memory regions for PFs and VFs in DRAM.
The PFs memory region is used for AF-PF and PF-VF mailbox.
This mbox facilitates communication between AF-PF and PF-VF.
On CN10K platform:
The DRAM region allocated to PF is enumerated as PF BAR4 memory.
PF BAR4 contains AF-PF mbox region
This patch adds support to use new LMTST lines for NPA batch free
and burst SQE flush. Adds new dev_hw_ops structure to hold platform
specific functions and create new files cn10k.c and cn10k.h.
Signed-off-by: Geetha sowjanya
Signed-off-by: Sunil Goutham
---
.../net/ethernet/marvell/octeontx2/n
From: Rakesh Babu
Flow control configuration is different for CGX(Octeontx2)
and RPM(CN10K) functional blocks. This patch adds the necessary
changes for RPM to support 802.3 pause frames configuration on
cn10k platforms.
Signed-off-by: Rakesh Babu
Signed-off-by: Geetha sowjanya
Signed-off-by:
On CN10K platform NPA and NIX context structure bit fields
had changed to support new features like bandwidth steering etc.
This patch dumps approprate context for CN10K platform.
Signed-off-by: Geetha sowjanya
Signed-off-by: Sunil Goutham
---
.../ethernet/marvell/octeontx2/af/rvu_debugfs.c
If this configuration item is not turned on,
the allocation of crypto_tfm will fail when
the shash algorithm calculates the hash
through the software.
Signed-off-by: Longfang Liu
---
arch/arm64/configs/defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/confi
1. Fix a problem of error log printing
2. Modify error log printing style
Signed-off-by: Longfang Liu
---
drivers/crypto/hisilicon/sec2/sec.h| 5 +-
drivers/crypto/hisilicon/sec2/sec_crypto.c | 82 +++---
drivers/crypto/hisilicon/sec2/sec_crypto.h | 2 -
3 files
1. Fix two problems.
2. Fix some coding style.
Longfang Liu (3):
crypto: hisilicon/sec - fixes some log printing style
crypto: hisilicon/sec - fixes some driver coding style
crypto: hisilicon/sec - fixes shash test error
arch/arm64/configs/defconfig | 2 +-
drivers/crypto/h
On Fri, Feb 05, 2021 at 02:08:47PM +0100, Uwe Kleine-König wrote:
> This was non-trivial to get right because commits
> c23bc382ef0e ("coresight: etm4x: Refactor probing routine") and
> 5214b563588e ("coresight: etm4x: Add support for sysreg only devices")
> changed the code flow considerably. With
On Thu, 2021-02-04 at 18:55 +, Lee Jones wrote:
> On Thu, 04 Feb 2021, Alessandrelli, Daniele wrote:
>
> > On Thu, 2021-02-04 at 11:09 +, Lee Jones wrote:
> > > Fixes the following W=1 kernel build warning(s):
> > >
> > > drivers/crypto/keembay/ocs-hcu.c:107: warning: expecting prototype
On 2/4/21 7:26 PM, Eric Biggers wrote:
On Thu, Feb 04, 2021 at 07:09:53PM -0500, Thara Gopinath wrote:
@@ -260,6 +261,10 @@ static int qce_skcipher_crypt(struct skcipher_request
*req, int encrypt)
rctx->flags |= encrypt ? QCE_ENCRYPT : QCE_DECRYPT;
keylen = IS_XTS(rctx->flags
This was non-trivial to get right because commits
c23bc382ef0e ("coresight: etm4x: Refactor probing routine") and
5214b563588e ("coresight: etm4x: Add support for sysreg only devices")
changed the code flow considerably. With this change the driver can be
built again.
Fixes: 0573d3fa4864 ("Merge b
On Mon, 2021-02-01 at 10:19 -0500, Stefan Berger wrote:
> Add support for IMA signature verification for EC keys. Since SHA type
> of hashes can be used by RSA and ECDSA signature schemes we need to
> look at the key and derive from the key which signature scheme to use.
> Since this can be applied
On Fri, Feb 05, 2021 at 06:10:57PM +0800, Longfang Liu wrote:
> If this configuration item is not turned on,
> the allocation of crypto_tfm will fail when
> the shash algorithm calculates the hash
> through the software.
>
> Signed-off-by: Longfang Liu
> ---
> arch/arm64/configs/defconfig | 2 +-
On Fri, Feb 05, 2021 at 11:56:15AM +0100, Uwe Kleine-König wrote:
> On Fri, Feb 05, 2021 at 11:18:17AM +0100, Greg Kroah-Hartman wrote:
> > On Fri, Feb 05, 2021 at 10:37:44AM +0100, Uwe Kleine-König wrote:
> > > Hello Russell, hello Greg,
> > >
> > > On Thu, Feb 04, 2021 at 07:15:51PM +0100, Uwe K
On Fri, Feb 05, 2021 at 11:18:17AM +0100, Greg Kroah-Hartman wrote:
> On Fri, Feb 05, 2021 at 10:37:44AM +0100, Uwe Kleine-König wrote:
> > Hello Russell, hello Greg,
> >
> > On Thu, Feb 04, 2021 at 07:15:51PM +0100, Uwe Kleine-König wrote:
> > > On Thu, Feb 04, 2021 at 04:59:51PM +, Russell K
Add 'qp_stop_fail_cb' to ensure it is called as device is resetting.
Signed-off-by: Weili Qian
Reviewed-by: Zaibo Xu
---
drivers/crypto/hisilicon/qm.c | 28
1 file changed, 28 insertions(+)
diff --git a/drivers/crypto/hisilicon/qm.c b/drivers/crypto/hisilicon/qm.c
Add waiting logic for resetting as removing driver,
otherwise call trace will occur due to releasing resource.
Signed-off-by: Weili Qian
Reviewed-by: Zaibo Xu
---
drivers/crypto/hisilicon/hpre/hpre_main.c | 2 +-
drivers/crypto/hisilicon/qm.c | 48 ---
d
This patchset fixes some bugs:
1. Removing the waiting reset's completion logic of driver.
2. In order to prevent request missing,
call user's callback before device resetting.
3. Fix the value of 'QM_SQC_VFT_BASE_MASK_V2'.
4. Update irqflag.
5. Do not reset when CE error occurs.
6. Fix printing
Since the size of base number is 16 bits, update the value of
'QM_SQC_VFT_BASE_MASK_V2' as 'GENMASK(15, 0)'.
Signed-off-by: Weili Qian
Reviewed-by: Zaibo Xu
---
drivers/crypto/hisilicon/qm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/hisilicon/qm.c b/driv
From: Sihang Chen
There is no need to share IRQ among several devices,
and set 'irqflag' as 0.
Signed-off-by: Sihang Chen
Signed-off-by: Weili Qian
Reviewed-by: Zaibo Xu
---
drivers/crypto/hisilicon/qm.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/crypt
There is no need to reset hardware when Corrected Error(CE) happens.
Signed-off-by: Weili Qian
Reviewed-by: Zaibo Xu
---
drivers/crypto/hisilicon/hpre/hpre_main.c | 1 +
drivers/crypto/hisilicon/qm.c | 23 +--
drivers/crypto/hisilicon/qm.h | 1 +
dr
On Fri, Feb 05, 2021 at 10:37:44AM +0100, Uwe Kleine-König wrote:
> Hello Russell, hello Greg,
>
> On Thu, Feb 04, 2021 at 07:15:51PM +0100, Uwe Kleine-König wrote:
> > On Thu, Feb 04, 2021 at 04:59:51PM +, Russell King - ARM Linux admin
> > wrote:
> > > On Thu, Feb 04, 2021 at 05:56:50PM +01
This patch fixes inconsistent of printing format with argument type.
Signed-off-by: Weili Qian
Reviewed-by: Zaibo Xu
---
drivers/crypto/hisilicon/qm.c | 16
drivers/crypto/hisilicon/qm.h | 2 +-
2 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/crypto/hisi
cleanup static check errors for SEC
Signed-off-by: Longfang Liu
---
drivers/crypto/hisilicon/sec2/sec_main.c | 131 ++-
1 file changed, 76 insertions(+), 55 deletions(-)
diff --git a/drivers/crypto/hisilicon/sec2/sec_main.c
b/drivers/crypto/hisilicon/sec2/sec_main.c
Hello Russell, hello Greg,
On Thu, Feb 04, 2021 at 07:15:51PM +0100, Uwe Kleine-König wrote:
> On Thu, Feb 04, 2021 at 04:59:51PM +, Russell King - ARM Linux admin
> wrote:
> > On Thu, Feb 04, 2021 at 05:56:50PM +0100, Greg Kroah-Hartman wrote:
> > > On Thu, Feb 04, 2021 at 04:52:24PM +,
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