On December 21, 2020 7:01:39 PM PST, tonywwang...@zhaoxin.com wrote:
>On December 22, 2020 3:27:33 AM GMT+08:00, h...@zytor.com wrote:
>>On December 20, 2020 6:46:25 PM PST, tonywwang...@zhaoxin.com wrote:
>>>On December 16, 2020 1:56:45 AM GMT+08:00, Eric Biggers
>>> wrote:
On Tue, Dec 15, 202
On December 22, 2020 3:27:33 AM GMT+08:00, h...@zytor.com wrote:
>On December 20, 2020 6:46:25 PM PST, tonywwang...@zhaoxin.com wrote:
>>On December 16, 2020 1:56:45 AM GMT+08:00, Eric Biggers
>> wrote:
>>>On Tue, Dec 15, 2020 at 10:15:29AM +0800, Tony W Wang-oc wrote:
On 15/12/2020 04:4
On Fri, Dec 18, 2020 at 01:10:57PM -0800, Megha Dey wrote:
> Optimize crypto algorithms using VPCLMULQDQ and VAES AVX512 instructions
> (first implemented on Intel's Icelake client and Xeon CPUs).
>
> These algorithms take advantage of the AVX512 registers to keep the CPU
> busy and increase memor
On Thu, 17 Dec 2020 17:21:00 +, Daniele Alessandrelli wrote:
> From: Prabhjot Khurana
>
> Add Keem Bay Offload and Crypto Subsystem (OCS) Elliptic Curve
> Cryptography (ECC) device tree bindings.
>
> Signed-off-by: Prabhjot Khurana
> Signed-off-by: Daniele Alessandrelli
> ---
> .../crypto
Hi Ard,
On Sat, Dec 12, 2020 at 10:16:56AM +0100, Ard Biesheuvel wrote:
> Clean up some issues and peculiarities in the gcm(aes-ni) driver.
>
> Cc: Eric Biggers
> Cc: Herbert Xu
>
> Ard Biesheuvel (4):
> crypto: x86/gcm-aes-ni - prevent misaligned IV buffers on the stack
> crypto: x86/gcm-
On December 20, 2020 6:46:25 PM PST, tonywwang...@zhaoxin.com wrote:
>On December 16, 2020 1:56:45 AM GMT+08:00, Eric Biggers
> wrote:
>>On Tue, Dec 15, 2020 at 10:15:29AM +0800, Tony W Wang-oc wrote:
>>>
>>> On 15/12/2020 04:41, Eric Biggers wrote:
>>> > On Mon, Dec 14, 2020 at 10:28:19AM +0800,
