On 2020/5/28 20:37, Dan Carpenter wrote:
> Originally this code rejected any read less than 256 bytes. There
> is no need for this artificial limit.
>
> Also I have changed the snprintf() functions to scnprintf(). The
> difference is that snprintf() returns the number of bytes which would
> have
Am Freitag, 29. Mai 2020, 06:54:43 CEST schrieb Herbert Xu:
Hi Herbert,
> Somewhere along the line the cap on the SG list length for receive
> was lost. This patch restores it and removes the subsequent test
> which is now redundant.
>
> Fixes: 2d97591ef43d ("crypto: af_alg - consolidation of..
Somewhere along the line the cap on the SG list length for receive
was lost. This patch restores it and removes the subsequent test
which is now redundant.
Fixes: 2d97591ef43d ("crypto: af_alg - consolidation of...")
Cc:
Signed-off-by: Herbert Xu
diff --git a/crypto/algif_skcipher.c b/crypto/a
On Thu, May 28, 2020 at 07:00:51PM +0200, sbuisson@gmail.com wrote:
> From: Sebastien Buisson
>
> Add adler32 to CryptoAPI so that it can be used with the normal kernel
> API, and potentially accelerated if architecture-specific
> optimizations are available.
>
> Signed-off-by: Sebastien Bui
From: Sebastien Buisson
Add adler32 to CryptoAPI so that it can be used with the normal kernel
API, and potentially accelerated if architecture-specific
optimizations are available.
Signed-off-by: Sebastien Buisson
---
crypto/Kconfig| 7 +
crypto/Makefile | 1 +
crypto/adler3
On 28/05/2020 18:27, Rob Herring wrote:
On Thu, 14 May 2020 16:19:47 +0300, Tero Kristo wrote:
Convert TI OMAP Random number generator bindings to DT schema.
Signed-off-by: Tero Kristo
---
.../devicetree/bindings/rng/omap_rng.txt | 38 -
.../devicetree/bindings/rng/ti,omap-rng.
On 5/28/2020 2:05 PM, Andrei Botila (OSS) wrote:
> @@ -4698,6 +4698,9 @@ static void dpaa2_dpseci_free(struct dpaa2_caam_priv
> *priv)
> struct device *dev = priv->dev;
> struct fsl_mc_device *ls_dev = to_fsl_mc_device(dev);
>
> + if (DPSECI_VER(priv->major_ver, priv->minor_ver)
On Thu, May 28, 2020 at 04:55:19PM +1000, Herbert Xu wrote:
> On Wed, May 20, 2020 at 12:45:56PM -0400, st...@rowland.harvard.edu wrote:
> > On Wed, May 20, 2020 at 03:42:17PM +, Sverdlin, Alexander (Nokia -
> > DE/Ulm) wrote:
> > > Hello Dinghao,
> > >
> > > On Wed, 2020-05-20 at 21:29 +0800
On Thu, 14 May 2020 16:19:47 +0300, Tero Kristo wrote:
> Convert TI OMAP Random number generator bindings to DT schema.
>
> Signed-off-by: Tero Kristo
> ---
> .../devicetree/bindings/rng/omap_rng.txt | 38 -
> .../devicetree/bindings/rng/ti,omap-rng.yaml | 77 +++
>
On Thu, 14 May 2020 15:50:05 +0300, Tero Kristo wrote:
> From: Keerthy
>
> The Security Accelerator Ultra Lite (SA2UL) subsystem provides hardware
> cryptographic acceleration for the following use cases:
>
> * Encryption and authentication for secure boot
> * Encryption and authentication of co
Originally this code rejected any read less than 256 bytes. There
is no need for this artificial limit.
Also I have changed the snprintf() functions to scnprintf(). The
difference is that snprintf() returns the number of bytes which would
have been copied if there were enough space and scnprintf
From: Andrei Botila
Add support for dpseci_reset() command for DPSECI objects.
For DPSECI DPAA2 objects with version lower than v5.4 reset command
was broken in MC f/w.
Signed-off-by: Andrei Botila
---
drivers/crypto/caam/caamalg_qi2.c | 11 +++
drivers/crypto/caam/dpseci.c | 18 +
Hello Dinghao,
On Thu, 2020-05-28 at 15:21 +0800, Dinghao Liu wrote:
> pm_runtime_get_sync() increments the runtime PM usage counter even
> the call returns an error code. Thus a pairing decrement is needed
> on the error handling path to keep the counter balanced.
>
> Signed-off-by: Dinghao Liu
On Thu, 28 May 2020 at 09:33, Herbert Xu wrote:
>
> Ard Biesheuvel wrote:
> > Stephan reports that the arm64 implementation of cts(cbc(aes)) deviates
> > from the generic implementation in what it returns as the output IV. So
> > fix this, and add some test vectors to catch other non-compliant
>
On Wed, May 20, 2020 at 05:19:50PM +0800, Shukun Tan wrote:
> From: Weili Qian
>
> In order to be compatible with devices of different versions, V1 in the
> accelerator driver is now isolated, and other versions are the previous
> V2 processing flow.
>
> Signed-off-by: Weili Qian
> Signed-off-b
On Tue, May 19, 2020 at 10:36:54PM +0200, Christophe JAILLET wrote:
> s/NITORX/NITROX/
>
> Signed-off-by: Christophe JAILLET
> ---
> drivers/crypto/cavium/nitrox/nitrox_main.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page: http:
On Wed, May 20, 2020 at 01:17:25AM +0300, Iuliana Prodan wrote:
> Now, in crypto-engine, if hardware queue is full (-ENOSPC),
> requeue request regardless of MAY_BACKLOG flag.
> If hardware throws any other error code (like -EIO, -EINVAL,
> -ENOMEM, etc.) only MAY_BACKLOG requests are enqueued back
On Wed, May 27, 2020 at 01:18:42PM -0500, Bjorn Helgaas wrote:
> Is this slowdown significant? We already iterate over every device
> when applying PCI_FIXUP_FINAL quirks, so if we used the existing
> PCI_FIXUP_FINAL, we wouldn't be adding a new loop. We would only be
> adding two more iterations
Ard Biesheuvel wrote:
> Stephan reports that the arm64 implementation of cts(cbc(aes)) deviates
> from the generic implementation in what it returns as the output IV. So
> fix this, and add some test vectors to catch other non-compliant
> implementations.
>
> Stephan, could you provide a referenc
pm_runtime_get_sync() increments the runtime PM usage counter even
the call returns an error code. Thus a pairing decrement is needed
on the error handling path to keep the counter balanced.
Signed-off-by: Dinghao Liu
---
Changelog:
v2: - Use pm_runtime_put_noidle() instead of pm_runtime_put_sy
> On Wed, May 20, 2020 at 12:45:56PM -0400, st...@rowland.harvard.edu wrote:
> > On Wed, May 20, 2020 at 03:42:17PM +, Sverdlin, Alexander (Nokia -
> > DE/Ulm) wrote:
> > > Hello Dinghao,
> > >
> > > On Wed, 2020-05-20 at 21:29 +0800, Dinghao Liu wrote:
> > > > pm_runtime_get_sync() increment
21 matches
Mail list logo
