From: Zhou Wang
Currently zip sqe is stored in hisi_zip_qp_ctx, which will bring corruption
with multiple parallel users of the crypto tfm.
This patch removes the zip_sqe in hisi_zip_qp_ctx and uses a temporary sqe
instead.
Signed-off-by: Zhou Wang
Signed-off-by: Jonathan Cameron
Signed-off-b
The codes related use_dma_api is useless which should be removed.
Signed-off-by: Shukun Tan
Reviewed-by: Zhou Wang
---
drivers/crypto/hisilicon/hpre/hpre_main.c | 1 -
drivers/crypto/hisilicon/qm.c | 34 ---
drivers/crypto/hisilicon/qm.h | 1
put q_num_set similar code into qm to reduce the redundancy.
Signed-off-by: Shukun Tan
Reviewed-by: Zhou Wang
---
drivers/crypto/hisilicon/hpre/hpre_main.c | 39 ++-
drivers/crypto/hisilicon/qm.h | 39 +++
drivers/crypto/hisili
From: Longfang Liu
Misc fixes on coding style:
1.Merge QM initialization code into a function
2.Merge QM's PF and VF initialization into a function
Signed-off-by: Longfang Liu
Signed-off-by: Zaibo Xu
Signed-off-by: Shukun Tan
Reviewed-by: Zhou Wang
---
drivers/crypto/hisilicon/zip/zip_main.
From: Zhou Wang
Add specific states for qm and qp, every state change under critical region
to prevent from race condition. Meanwhile, qp state change will also depend
on qm state.
Due to the introduction of these states, it is necessary to pay attention
to the calls of public logic, such as con
From: Weili Qian
Put all the code for the memory allocation into the QM initialization
process. Before, The qp memory was allocated when the qp was created,
and released when the qp was released, It is now changed to allocate
all the qp memory once.
Signed-off-by: Weili Qian
Signed-off-by: Shuk
From: Zhou Wang
Users can decide whether to use negative compression result, so it
should not be reported as an error by driver.
Signed-off-by: Zhou Wang
Signed-off-by: Shukun Tan
---
drivers/crypto/hisilicon/zip/zip_crypto.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a
From: Weili Qian
Some initial value assignment of struct hisi_qm could put into QM.
Signed-off-by: Weili Qian
Signed-off-by: Shukun Tan
Reviewed-by: Zhou Wang
---
drivers/crypto/hisilicon/hpre/hpre_main.c | 22 +++---
drivers/crypto/hisilicon/qm.c | 44 +++
Add callback reset_prepare and reset_done in QM, The callback
reset_prepare will uninit device error configuration and stop
the QM, the callback reset_done will init the device error
configuration and restart the QM.
Uninit the error configuration will disable device block master OOO
when Multi-bi
By configuring the device error in firmware to report through abnormal
interruption, process all NFE errors in irq handler.
Signed-off-by: Shukun Tan
Reviewed-by: Zhou Wang
---
drivers/crypto/hisilicon/qm.c | 340 +++---
drivers/crypto/hisilicon/qm.h | 1 +
The hardware device can be configured to report directly through MSI, but
this method will not go through RAS, configure all hardware errors that
should be processed by driver to NFE.
Signed-off-by: Shukun Tan
---
drivers/crypto/hisilicon/hpre/hpre_main.c | 1 -
drivers/crypto/hisilicon/qm.c
This patchset includes some misc updates.
patch 1-3: modify the accelerator probe process.
patch 4: refactor module parameter pf_q_num.
patch 5-6: add state machine and FLR support.
patch 7: remove use_dma_api related useless codes.
patch 8-9: QM initialization process and memory management optimiz
From: Longfang Liu
Misc fixes on coding style:
1.Merge pre-initialization and initialization of QM
2.Package the initialization of QM's PF and VF into a function
Signed-off-by: Longfang Liu
Signed-off-by: Zaibo Xu
Signed-off-by: Shukun Tan
---
drivers/crypto/hisilicon/hpre/hpre_main.c | 42 +
From: Longfang Liu
Adjust the position of SMMU status check and
SEC queue initialization in SEC probe
Signed-off-by: Longfang Liu
Signed-off-by: Zaibo Xu
Signed-off-by: Shukun Tan
Reviewed-by: Zhou Wang
---
drivers/crypto/hisilicon/sec2/sec_main.c | 67 ++--
1 fi
Eric Biggers wrote:
> sounds very generic and important, like it's the
> header to include if you're doing cryptographic hashing in the kernel.
> But actually it only includes the library implementation of the SHA-1
> compression function (not even the full SHA-1). This should basically
> never
Eric Biggers wrote:
> This series introduces a helper function crypto_shash_tfm_digest() which
> replaces the following common pattern:
>
>{
>SHASH_DESC_ON_STACK(desc, tfm);
>int err;
>
>desc->tfm = tfm;
>
>err = crypto_sha
On Thu, Apr 30, 2020 at 11:30:43PM +0200, Arnd Bergmann wrote:
> gcc-10 complains about using the name of a standard library
> function in the kernel, as we are not building with -ffreestanding:
>
> crypto/xts.c:325:13: error: conflicting types for built-in function 'free';
> expected 'void(void
On Thu, Apr 30, 2020 at 08:13:53AM +, Wei Yongjun wrote:
> Fix to return negative error code -ENOMEM from the kzalloc error handling
> case instead of 0, as done elsewhere in this function.
>
> Fixes: db07cd26ac6a ("crypto: drbg - add FIPS 140-2 CTRNG for noise source")
> Signed-off-by: Wei Yo
Eric Biggers wrote:
> From: Eric Biggers
>
> The SHA-256 / SHA-224 library functions can't fail, so remove the
> useless return value.
>
> Also long as the declarations are being changed anyway, also fix some
> parameter names in the declarations to match the definitions.
>
> Signed-off-by: Er
On Thu, Apr 30, 2020 at 05:10:18PM +1200, Barry Song wrote:
> users may call crypto_has_acomp to confirm the existence of acomp before using
> crypto_acomp APIs. Right now, many acomp have scomp backend, for example, lz4,
> lzo, deflate etc. crypto_has_acomp will return false for them even though t
On Tue, Apr 28, 2020 at 06:49:02PM +0300, Iuliana Prodan wrote:
> Added support for executing multiple, independent or not, requests
> for crypto engine based on a retry mechanism. If hardware was unable
> to execute a backlog request, enqueue it back in front of crypto-engine
> queue, to keep the
On Mon, Apr 27, 2020 at 02:36:01PM +0300, Hadar Gat wrote:
> Some fixes in Kconfig for cctrng:
> + add missing dependency on OF
> + change default to 'n'
> + improve inaccurate help description
>
> v3 change: fixed compilation issue
> v2 changes:
> + remove unneeded depends on HW_RANDOM.
>
On Mon, Apr 27, 2020 at 04:22:18PM +0800, Tang Bin wrote:
> Use the defined variable "dev" to make the code cleaner.
>
> Signed-off-by: Zhang Shengju
> Signed-off-by: Tang Bin
> ---
> drivers/crypto/bcm/cipher.c | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
Patch applied. Th
On Mon, Apr 27, 2020 at 08:42:23AM +0200, Lionel Debieve wrote:
> These patches manage properly the defer probe for STM32 Hash driver.
> It allows the driver to be probed later if clock, reset or dma return
> a defer error.
> It also removes the error print messages in such cases.
>
> Etienne Carr
On 08/05/2020 08:08, Herbert Xu wrote:
On Wed, Apr 29, 2020 at 05:42:02PM +0300, Tero Kristo wrote:
diff --git a/drivers/crypto/omap-crypto.c b/drivers/crypto/omap-crypto.c
index cc88b7362bc2..cbc5a4151c3c 100644
--- a/drivers/crypto/omap-crypto.c
+++ b/drivers/crypto/omap-crypto.c
@@ -178,11 +
On Wed, Apr 29, 2020 at 05:42:02PM +0300, Tero Kristo wrote:
>
> diff --git a/drivers/crypto/omap-crypto.c b/drivers/crypto/omap-crypto.c
> index cc88b7362bc2..cbc5a4151c3c 100644
> --- a/drivers/crypto/omap-crypto.c
> +++ b/drivers/crypto/omap-crypto.c
> @@ -178,11 +178,14 @@ static void omap_cryp
On Thu, May 07, 2020 at 02:18:42PM -0700, Alexander Duyck wrote:
> The idea behind merging ranges it to address possible cases where a
> range is broken up such that there is a hole in a max order block as a
> result.
Gah, yes, you're right, there could be multiple ranges in a max order block, so
On 5/2/20 12:31 AM, Eric Biggers wrote:
From: Eric Biggers
Instead of manually allocating a 'struct shash_desc' on the stack and
calling crypto_shash_digest(), switch to using the new helper function
crypto_shash_tfm_digest() which does this for us.
Cc: Tom Lendacky
Signed-off-by: Eric Bigger
On Thu, May 7, 2020 at 1:20 PM Daniel Jordan wrote:
>
> On Thu, May 07, 2020 at 08:26:26AM -0700, Alexander Duyck wrote:
> > On Wed, May 6, 2020 at 3:39 PM Daniel Jordan
> > wrote:
> > > On Tue, May 05, 2020 at 08:27:52AM -0700, Alexander Duyck wrote:
> > > > > Maybe it's better to leave deferre
On Thu, May 07, 2020 at 08:26:26AM -0700, Alexander Duyck wrote:
> On Wed, May 6, 2020 at 3:39 PM Daniel Jordan
> wrote:
> > On Tue, May 05, 2020 at 08:27:52AM -0700, Alexander Duyck wrote:
> > > > Maybe it's better to leave deferred_init_maxorder alone and adapt the
> > > > multithreading to the
The current codebase makes use of the zero-length array language
extension to the C90 standard, but the preferred mechanism to declare
variable-length types such as these ones is a flexible array member[1][2],
introduced in C99:
struct foo {
int stuff;
struct boo array[];
};
By ma
On Wed, May 6, 2020 at 3:39 PM Daniel Jordan wrote:
>
> On Tue, May 05, 2020 at 08:27:52AM -0700, Alexander Duyck wrote:
> > As it turns out that deferred_free_range will be setting the
> > migratetype for the page. In a sparse config the migratetype bits are
> > stored in the section bitmap. So t
==
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