On Mon, Oct 07, 2019 at 06:45:48PM +0200, Ard Biesheuvel wrote:
> +static int chacha_stream_xor(struct skcipher_request *req,
> + const struct chacha_ctx *ctx, const u8 *iv)
> +{
> + struct skcipher_walk walk;
> + u32 state[16];
> + int err;
> +
> + err = sk
On Mon, Oct 07, 2019 at 06:46:09PM +0200, Ard Biesheuvel wrote:
> diff --git a/crypto/Kconfig b/crypto/Kconfig
> index b9b0e969a1ce..05e80d7d5e40 100644
> --- a/crypto/Kconfig
> +++ b/crypto/Kconfig
> @@ -302,6 +302,13 @@ config CRYPTO_GCM
> Support for Galois/Counter Mode (GCM) and Galois
On Mon, Oct 07, 2019 at 06:45:48PM +0200, Ard Biesheuvel wrote:
> diff --git a/arch/arm/crypto/chacha-scalar-core.S
> b/arch/arm/crypto/chacha-scalar-core.S
> index 2140319b64a0..0970ae107590 100644
> --- a/arch/arm/crypto/chacha-scalar-core.S
> +++ b/arch/arm/crypto/chacha-scalar-core.S
> @@ -41,
On Mon, Oct 07, 2019 at 06:45:52PM +0200, Ard Biesheuvel wrote:
> Now that all users of generic ChaCha code have moved to the core library,
> there is no longer a need for the generic ChaCha skcpiher driver to
> export parts of it implementation for reuse by other drivers. So drop
> the exports, an
On Mon, Oct 07, 2019 at 06:46:02PM +0200, Ard Biesheuvel wrote:
> From: "Jason A. Donenfeld"
>
> The C implementation was originally based on Samuel Neves' public
> domain reference implementation but has since been heavily modified
> for the kernel. We're able to do compile-time optimizations by
On Mon, Oct 07, 2019 at 06:45:43PM +0200, Ard Biesheuvel wrote:
> In preparation of extending the x86 ChaCha driver to also expose the ChaCha
> library interface, drop the dependency on the chacha_generic crypto driver
> as a non-SIMD fallback, and depend on the generic ChaCha library directly.
> T
From: Eric Biggers
The geode AES driver is heavily broken because it stores per-request
state in the transform context. So it will crash or produce the wrong
result if used by any of the many places in the kernel that issue
concurrent requests for the same transform object.
This driver is also
On 2019/10/10 20:54, Herbert Xu wrote:
> On Mon, Sep 30, 2019 at 03:08:51PM +0800, Zhou Wang wrote:
>> This series fixes some preblems in sgl code. The main change is merging sgl
>> code into hisi_qm module.
>>
>> These problem are also fixed:
>> - Let user driver to pass the configure of sge num
On 2019/10/10 22:25, kbuild test robot wrote:
> tree:
> https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git
> master
> head: 504582e8e40b90b8f8c58783e2d1e4f6a2b71a3a
> commit: a92a00f809503c6db9dac518951e060ab3d6f6ee [65/78] crypto: hisilicon -
> misc fix about sgl
> co
A couple more comments:
On Thu, Oct 10, 2019 at 04:10:05PM +0200, David Sterba wrote:
> +static void blake2b_set_lastnode(struct blake2b_state *S)
> +{
> + S->f[1] = (u64)-1;
> +}
> +
[...]
> +static void blake2b_set_lastblock(struct blake2b_state *S)
> +{
> + if (S->last_node)
> +
Hi David, thanks for working on this. Comments below.
On Thu, Oct 10, 2019 at 04:10:05PM +0200, David Sterba wrote:
> The patch brings support of several BLAKE2 variants (2b with various
> digest lengths). The keyed digest is supported, using tfm->setkey call.
> The in-tree user will be btrfs (f
On Fri, 20 Sep 2019 18:36:35 +0200, Krzysztof Kozlowski wrote:
> Convert Samsung Exynos Security SubSystem (SSS) and SlimSSS hardware
> crypto accelerator bindings to DT schema format using json-schema.
>
> Signed-off-by: Krzysztof Kozlowski
>
> ---
>
> Rebased on linux-next due to conflicting
On Wed, 2 Oct 2019 18:13:40 +0200, Krzysztof Kozlowski wrote:
> Convert Samsung Exynos Pseudo Random Number Generator bindings to DT
> schema format using json-schema.
>
> Signed-off-by: Krzysztof Kozlowski
>
> ---
>
> Changes since v2:
> 1. Add additionalProperties false,
> 2. Include clock h
The Crypto Engine is a hardware cryptographic accelerator that supports
many algorithms.
It could be found on most Allwinner SoCs.
This patch enables the Crypto Engine on the Allwinner H3 SoC Device-tree.
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sun8i-h3.dtsi | 10 ++
1 file
Hello
This patch serie adds support for the Allwinner crypto engine.
The Crypto Engine is the third generation of Allwinner cryptogaphic offloader.
The first generation is the Security System already handled by the
sun4i-ss driver.
The second is named also Security System and is present on A80 and
This patch adds the new Allwinner crypto configs to sunxi_defconfig
Signed-off-by: Corentin Labbe
---
arch/arm/configs/sunxi_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/sunxi_defconfig b/arch/arm/configs/sunxi_defconfig
index df433abfcb02..d0ab8ba7710a 100644
Since a second Allwinner crypto driver will be added, it is better to
create a dedicated subdirectory.
Signed-off-by: Corentin Labbe
---
MAINTAINERS | 6 ++
drivers/crypto/Kconfig | 2 ++
drivers/crypto/Makefile | 1 +
drivers/crypto/allwinner/Kconfig
The Crypto Engine is a hardware cryptographic accelerator that supports
many algorithms.
This patch enables the Crypto Engine on the Allwinner H6 SoC Device-tree.
Signed-off-by: Corentin Labbe
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 10 ++
1 file changed, 10 insertions(+)
di
The Crypto Engine is a hardware cryptographic accelerator that supports
many algorithms.
It could be found on most Allwinner SoCs.
This patch enables the Crypto Engine on the Allwinner H5 SoC Device-tree.
Signed-off-by: Corentin Labbe
---
arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 10 ++
Since we have a dedicated Allwinner directory for crypto driver, move
the sun4i-ss driver in it.
Signed-off-by: Corentin Labbe
---
MAINTAINERS | 6 -
drivers/crypto/Kconfig| 26 --
drivers/crypto/Makefile
The Crypto Engine is an hardware cryptographic offloader present
on all recent Allwinner SoCs H2+, H3, R40, A64, H5, H6
This driver supports AES cipher in CBC/ECB mode.
Signed-off-by: Corentin Labbe
---
drivers/crypto/allwinner/Kconfig | 27 +
drivers/crypto/allwinner/Makefile
The Crypto Engine is a hardware cryptographic accelerator that supports
many algorithms.
It could be found on most Allwinner SoCs.
This patch enables the Crypto Engine on the Allwinner A64 SoC Device-tree.
Signed-off-by: Corentin Labbe
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 10
This patch adds the new allwinner crypto configs to ARM64 defconfig
Signed-off-by: Corentin Labbe
---
arch/arm64/configs/defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index c9adae41bac0..c45fb6822e4a 100644
--- a/arch/
This patch adds documentation for Device-Tree bindings for the
Crypto Engine cryptographic accelerator driver.
Signed-off-by: Corentin Labbe
---
.../bindings/crypto/allwinner,sun8i-ce.yaml | 92 +++
1 file changed, 92 insertions(+)
create mode 100644
Documentation/devicetree/
The Crypto Engine is a hardware cryptographic offloader that supports
many algorithms.
It could be found on most Allwinner SoCs.
This patch enables the Crypto Engine on the Allwinner R40 SoC Device-tree.
Signed-off-by: Corentin Labbe
---
arch/arm/boot/dts/sun8i-r40.dtsi | 10 ++
1 file
The pull request you sent on Thu, 10 Oct 2019 23:38:49 +1100:
> git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6.git linus
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/fb20da6af705597cefcf05fc99e48d5c066dbdff
Thank you!
--
Deet-doot-dot, I am a bot
From: kbuild test robot
drivers/crypto/inside-secure/safexcel_hash.c:2081:1-3: WARNING: PTR_ERR_OR_ZERO
can be used
Use PTR_ERR_OR_ZERO rather than if(IS_ERR(...)) + PTR_ERR
Generated by: scripts/coccinelle/api/ptr_ret.cocci
Fixes: 38f21b4bab11 ("crypto: inside-secure - Added support for th
tree:
https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git master
head: 504582e8e40b90b8f8c58783e2d1e4f6a2b71a3a
commit: 38f21b4bab11fc877ff18dd02f77f2c34f1105b9 [3/78] crypto: inside-secure -
Added support for the AES XCBC ahash
If you fix the issue, kindly add followin
On Thu, 10 Oct 2019 at 16:09, David Sterba wrote:
>
> The patch brings support of several BLAKE2 variants (2b with various
> digest lengths). The keyed digest is supported, using tfm->setkey call.
> The in-tree user will be btrfs (for checksumming), we're going to use
> the BLAKE2b-256 variant.
>
Hello Dearest, Our company is looking for a representative in USA. You
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tree:
https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git master
head: 504582e8e40b90b8f8c58783e2d1e4f6a2b71a3a
commit: a92a00f809503c6db9dac518951e060ab3d6f6ee [65/78] crypto: hisilicon -
misc fix about sgl
config: riscv-allyesconfig (attached as .config)
compiler: risc
The patch brings support of several BLAKE2 variants (2b with various
digest lengths). The keyed digest is supported, using tfm->setkey call.
The in-tree user will be btrfs (for checksumming), we're going to use
the BLAKE2b-256 variant.
The code is reference implementation taken from the official
Hi,
On Wed, Oct 09, 2019 at 03:47:09PM +0200, Ard Biesheuvel wrote:
> I have a couple more comments - apologies for not spotting these the
> first time around.
No problem, there was a lot of churn since v1.
> > +enum {
> > + BLAKE2_DUMMY_2 = 1 / (sizeof(struct blake2b_param) ==
> > BLAKE2
tree:
https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git master
head: 504582e8e40b90b8f8c58783e2d1e4f6a2b71a3a
commit: c8b4b477079d1995cc0a1c10d5cdfd02be938cdf [66/78] crypto: hisilicon -
add HiSilicon HPRE accelerator
reproduce:
# apt-get install sparse
--
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On Sat, Oct 05, 2019 at 11:11:10AM +0200, Ard Biesheuvel wrote:
> Commit 79c65d179a40e145 ("crypto: cbc - Convert to skcipher") updated
> the generic CBC template wrapper from a blkcipher to a skcipher algo,
> to get away from the deprecated blkcipher interface. However, as a side
> effect, drivers
On Fri, Oct 04, 2019 at 02:34:54PM -0500, Navid Emamdoost wrote:
> In crypto_reportstat, a new skb is created by nlmsg_new(). This skb is
> leaked if crypto_reportstat_alg() fails. Required release for skb is
> added.
>
> Fixes: cac5818c25d0 ("crypto: user - Implement a generic crypto statistics")
On Fri, Oct 04, 2019 at 02:29:16PM -0500, Navid Emamdoost wrote:
> In crypto_report, a new skb is created via nlmsg_new(). This skb should
> be released if crypto_report_alg() fails.
>
> Fixes: a38f7907b926 ("crypto: Add userspace configuration API")
> Signed-off-by: Navid Emamdoost
> ---
> cryp
On Fri, Oct 04, 2019 at 08:55:37AM +, tudor.amba...@microchip.com wrote:
> From: Tudor Ambarus
>
> commit 394a9e044702 ("crypto: cfb - add missing 'chunksize' property")
> adds a test vector where the input length is smaller than the IV length
> (the second test vector). This revealed a NULL
On Fri, Oct 04, 2019 at 10:50:58AM -0700, Ayush Sawal wrote:
> when libkcapi test is executed using HW accelerator, cipher operation
> return -74.Since af_alg_async_cb->ki_complete treat err as unsigned int,
> libkcapi receive 429467222 even though it expect -ve value.
>
> Hence its required to c
On Wed, Oct 02, 2019 at 09:54:48AM +0200, Ard Biesheuvel wrote:
> Now that the Clang compiler has taken it upon itself to police the
> compiler command line, and reject combinations for arguments it views
> as incompatible, the AEGIS128 no longer builds correctly, and errors
> out like this:
>
>
On Mon, Sep 30, 2019 at 02:14:35PM +0200, Arnd Bergmann wrote:
> When both PCI and OF are disabled, no drivers are registered, and
> we get some unused-function warnings:
>
> drivers/crypto/inside-secure/safexcel.c:1221:13: error: unused function
> 'safexcel_unregister_algorithms' [-Werror,-Wunus
On Mon, Sep 30, 2019 at 02:14:33PM +0200, Arnd Bergmann wrote:
> A previous fixup avoided an unused variable warning but replaced
> it with a slightly scarier warning:
>
> drivers/crypto/inside-secure/safexcel.c:1100:6: error: variable 'irq' is used
> uninitialized whenever 'if' condition is fals
On Mon, Sep 30, 2019 at 03:08:51PM +0800, Zhou Wang wrote:
> This series fixes some preblems in sgl code. The main change is merging sgl
> code into hisi_qm module.
>
> These problem are also fixed:
> - Let user driver to pass the configure of sge number in one sgl when
>creating hardware sg
On Mon, Sep 30, 2019 at 05:20:04PM +0800, Zaibo Xu wrote:
> This series adds HiSilicon high performance RSA engine(HPRE) driver
> in crypto subsystem. HPRE driver provides PCIe hardware device initiation
> with RSA and DH algorithms registered to Crypto. Meanwhile, some debug
> supporting of DebugF
On Thu, Sep 12, 2019 at 03:30:22PM +0200, Laurent Vivier wrote:
> add_early_randomness() is called every time a new rng backend is added
> and every time it is set as the current rng provider.
>
> add_early_randomness() is called from functions locking rng_mutex,
> and if it hangs all the hw_rando
On Mon, Sep 30, 2019 at 02:14:34PM +0200, Arnd Bergmann wrote:
> safexcel_aead_setkey() contains three large stack variables, totalling
> slightly more than the 1024 byte warning limit:
>
> drivers/crypto/inside-secure/safexcel_cipher.c:303:12: error: stack frame
> size of 1032 bytes in function
Hi Linus:
This push fixes build issues in arm/aes-ce.
The following changes since commit bf6a7a5ad6fa69e48b735be75eeb90569d9584bb:
crypto: hisilicon - avoid unused function warning (2019-09-20 23:05:33 +1000)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel
As a type CRYPTO_ALG_TYPE_ACOMPRESS is needed to trigger crypto acomp test,
we introduce a new help function tcrypto_test_extend to pass type and mask
to alg_test.
Then tcrypto module can be used to do basic acomp test by:
insmod tcrypto.ko alg="zlib-deflate" mode=55 type=10
Signed-off-by: Zhou W
On 2019/9/30 15:08, Zhou Wang wrote:
> This series fixes some preblems in sgl code. The main change is merging sgl
> code into hisi_qm module.
>
> These problem are also fixed:
> - Let user driver to pass the configure of sge number in one sgl when
>creating hardware sgl resources.
> - When
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