On 7/23/2019 4:20 AM, Vakul Garg wrote:
>>> @@ -64,6 +65,7 @@ struct dpaa2_caam_priv {
>>> struct iommu_domain *domain;
>>>
>>> struct dpaa2_caam_priv_per_cpu __percpu *ppriv;
>>> + struct dentry *dfs_root;
>> dfs_root is used only in dpseci-debugfs.c, let's have it there as global.
>>
>
On 22/07/19 11:59 PM, Rob Herring wrote:
On Fri, Jun 28, 2019 at 09:57:36AM +0530, Keerthy wrote:
The series adds Crypto hardware accelerator support for SA2UL.
SA2UL stands for security accelerator ultra lite.
The Security Accelerator (SA2_UL) subsystem provides hardware
cryptographic accel
Dear Rob,
You can check my driver for detail:
http://patchwork.kernel.org/patch/11012475/ or patchset 3/3
This driver is registered as hardware random number generator, and
combines with rng-core.
We want to add one rng hw based on the dts. Is this proper or do you
> -Original Message-
> From: Horia Geanta
> Sent: Monday, July 22, 2019 7:55 PM
> To: Vakul Garg ; linux-crypto@vger.kernel.org
> Cc: Aymen Sghaier ;
> herb...@gondor.apana.org.au
> Subject: Re: [PATCH v2] crypto: caam/qi2 - Add printing dpseci fq stats using
> debugfs
>
> On 7/19/2019
Add support of printing the dpseci frame queue statistics using debugfs.
Signed-off-by: Vakul Garg
---
Changes v2 -> v3
- Removed CONFIG_CRYPTO_DEV_FSL_DPAA2_CAAM_DEBUGFS
- Moved var 'dfs_root' out of structure 'dpaa2_caam_priv'.
drivers/crypto/caam/Makefile | 1 +
dri
> -Original Message
> From: Eric Biggers
> Sent: Tuesday, July 23, 2019 1:07 AM
> To: Pascal Van Leeuwen
> Cc: linux-crypto@vger.kernel.org; Herbert Xu ;
> da...@davemloft.net
> Subject: Re: Testmgr fuzz testing
>
> > >
> > > Sure, it's not always repeatable, but that's the nature of fu
On Mon, Jul 22, 2019 at 10:09:03PM +, Pascal Van Leeuwen wrote:
> > -Original Message-
> > From: Eric Biggers
> > Sent: Monday, July 22, 2019 6:06 PM
> > To: Pascal Van Leeuwen
> > Cc: linux-crypto@vger.kernel.org; Herbert Xu ;
> > da...@davemloft.net
> > Subject: Re: Testmgr fuzz te
> -Original Message-
> From: Eric Biggers
> Sent: Monday, July 22, 2019 6:23 PM
> To: Pascal Van Leeuwen
> Cc: linux-crypto@vger.kernel.org; Herbert Xu ;
> da...@davemloft.net
> Subject: Re: AEAD question
>
> On Mon, Jul 22, 2019 at 12:55:39PM +, Pascal Van Leeuwen wrote:
> > Eric &
> -Original Message-
> From: Eric Biggers
> Sent: Monday, July 22, 2019 6:06 PM
> To: Pascal Van Leeuwen
> Cc: linux-crypto@vger.kernel.org; Herbert Xu ;
> da...@davemloft.net
> Subject: Re: Testmgr fuzz testing
>
> Hi Pascal,
>
> On Mon, Jul 22, 2019 at 10:27:22AM +, Pascal Van Le
On Fri, Jun 28, 2019 at 09:57:36AM +0530, Keerthy wrote:
> The series adds Crypto hardware accelerator support for SA2UL.
> SA2UL stands for security accelerator ultra lite.
>
> The Security Accelerator (SA2_UL) subsystem provides hardware
> cryptographic acceleration for the following use cases:
Am Montag, 22. Juli 2019, 20:07:05 CEST schrieb Bhat, Jayalakshmi Manjunath:
Hi Jayalakshmi,
> Hi All,
>
> We are in the process of implementing
> KAT - known answer test
> MMT - Multi-block Message Test
> MCT - Monte Carlo Test
> KAS FFC - Key Agreement Scheme, Finite F
Hi All,
We are in the process of implementing
KAT - known answer test
MMT - Multi-block Message Test
MCT - Monte Carlo Test
KAS FFC - Key Agreement Scheme, Finite Field Cryptography
KAS ECC - Elliptic Curve Cryptography
Our approach to implement the testi
On Mon, Jun 24, 2019 at 03:24:11PM +0800, Neal Liu wrote:
> Document the binding used by the MediaTek ARMv8 SoCs random
> number generator with TrustZone enabled.
>
> Signed-off-by: Neal Liu
> ---
> .../devicetree/bindings/rng/mtk-sec-rng.txt| 10 ++
> 1 file changed, 10 insert
On Mon, Jul 22, 2019 at 12:55:39PM +, Pascal Van Leeuwen wrote:
> Eric & Herbert,
>
> I noticed the testmgr fuzz tester generating (occasionally, see previous
> mail) tests cases with
> authsize=0 for the AEAD ciphers. I'm wondering if that is intentional. Or
> actually, I'm wondering
> whe
Hi Pascal,
On Mon, Jul 22, 2019 at 10:27:22AM +, Pascal Van Leeuwen wrote:
> Eric,
>
> While fixing some issues in the inside-secure driver reported by the fuzz, I
> noticed that the
> results are actually not repeatable: odds are high that on the next run, the
> error case is
> actually
On 7/22/2019 5:29 PM, Vakul Garg wrote:
>> -Original Message-
>> From: Horia Geanta
>> Sent: Monday, July 22, 2019 7:55 PM
>> To: Vakul Garg ; linux-crypto@vger.kernel.org
>> Cc: Aymen Sghaier ;
>> herb...@gondor.apana.org.au
>> Subject: Re: [PATCH v2] crypto: caam/qi2 - Add printing dpseci
Add Nuvoton NPCM BMC Random Number Generator(RNG) driver.
Signed-off-by: Tomer Maimon
---
drivers/char/hw_random/Kconfig| 13 ++
drivers/char/hw_random/Makefile | 1 +
drivers/char/hw_random/npcm-rng.c | 207 ++
3 files changed, 221 insertions(+)
create mode
Added device tree binding documentation for Nuvoton BMC
NPCM Random Number Generator (RNG).
Signed-off-by: Tomer Maimon
---
.../bindings/rng/nuvoton,npcm-rng.txt | 17 +
1 file changed, 17 insertions(+)
create mode 100644 Documentation/devicetree/bindings/rng/nuvoton,n
This patch set adds Randon Number Generator (RNG) support
for the Nuvoton NPCM Baseboard Management Controller (BMC).
The RNG driver we use power consumption when the RNG
is not required.
The NPCM RNG driver tested on NPCM750 evaluation board.
Tomer Maimon (2):
dt-binding: hwrng: add NPCM RN
> -Original Message-
> From: Horia Geanta
> Sent: Monday, July 22, 2019 7:55 PM
> To: Vakul Garg ; linux-crypto@vger.kernel.org
> Cc: Aymen Sghaier ;
> herb...@gondor.apana.org.au
> Subject: Re: [PATCH v2] crypto: caam/qi2 - Add printing dpseci fq stats using
> debugfs
>
> On 7/19/2019
On 7/19/2019 2:23 PM, Vakul Garg wrote:
[...]
> +if CRYPTO_DEV_FSL_DPAA2_CAAM
> +
> +config CRYPTO_DEV_FSL_DPAA2_CAAM_DEBUGFS
> + depends on DEBUG_FS
> + bool "Enable debugfs support"
> + help
> + Selecting this will enable printing of various debug information
> + in the
Eric & Herbert,
I noticed the testmgr fuzz tester generating (occasionally, see previous mail)
tests cases with
authsize=0 for the AEAD ciphers. I'm wondering if that is intentional. Or
actually, I'm wondering
whether that should be considered a legal case.
To me, it doesn't seem to make a whol
Eric,
While fixing some issues in the inside-secure driver reported by the fuzz, I
noticed that the
results are actually not repeatable: odds are high that on the next run, the
error case is
actually not hit anymore since they're typically very specific corner cases.
There's 2 problems with
Dear Matthias, Rob, Mark,
Just gentle ping.
Thanks
On Mon, 2019-06-24 at 15:24 +0800, Neal Liu wrote:
> These patch series introduce a generic rng driver for Trustzone
> based kernel driver which would like to communicate with ATF
> SIP services.
>
> Patch #1 initials SMC fid tab
> -Original Message-
> From: Eric Biggers
> Sent: Saturday, July 20, 2019 8:09 AM
> To: linux-crypto@vger.kernel.org; Herbert Xu
> Cc: Pascal Van Leeuwen
> Subject: [PATCH] crypto: ghash - add comment and improve help text
>
> From: Eric Biggers
>
> To help avoid confusion, add a comm
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