On 2/14/2018 8:31 PM, SF Markus Elfring wrote:
> From: Markus Elfring
> Date: Wed, 14 Feb 2018 18:22:38 +0100
>
> Omit an extra message for a memory allocation failure in these functions.
>
> This issue was detected by using the Coccinelle software.
>
> Signed-off-by: Markus Elfring
Reviewed-b
Am Donnerstag, 15. Februar 2018, 08:03:20 CET schrieb Harsh Jain:
Hi Harsh,
> Even after guarantee of serialization, In the end we will get wrong result
> as mentioned above. which destination side cannot decrypt it. What I feel
> is scenario of sending 2 of more IOCB in case of AEAD itself is wr
On 15-02-2018 11:58, Stephan Mueller wrote:
> Am Donnerstag, 15. Februar 2018, 06:30:36 CET schrieb Harsh Jain:
>
> Hi Harsh,
>
>> On 14-02-2018 18:22, Stephan Mueller wrote:
>>> Am Mittwoch, 14. Februar 2018, 06:43:53 CET schrieb Harsh Jain:
>>>
>>> Hi Harsh,
>>>
Patch set is working fine w
Key area size in hw-config file. CPL struct for TLS request
and response. Work request for Inline TLS.
Signed-off-by: Atul Gupta
---
drivers/net/ethernet/chelsio/cxgb4/t4_msg.h | 121 ++-
drivers/net/ethernet/chelsio/cxgb4/t4_regs.h | 2 +
drivers/net/ethernet/chelsio/cxgb4/
Entry for Inline TLS as another driver dependent on cxgb4 and chcr
Signed-off-by: Atul Gupta
---
drivers/crypto/chelsio/Kconfig| 11 +++
drivers/crypto/chelsio/Makefile | 1 +
drivers/crypto/chelsio/chtls/Makefile | 4
3 files changed, 16 insertions(+)
create mode 1
Program the tx and rx key on chip.
Signed-off-by: Atul Gupta
---
drivers/crypto/chelsio/chtls/chtls_hw.c | 394
1 file changed, 394 insertions(+)
create mode 100644 drivers/crypto/chelsio/chtls/chtls_hw.c
diff --git a/drivers/crypto/chelsio/chtls/chtls_hw.c
b/
Define macro for TLS Key context
Signed-off-by: Atul Gupta
---
drivers/crypto/chelsio/chcr_algo.h | 42 +
drivers/crypto/chelsio/chcr_core.h | 55 +-
2 files changed, 96 insertions(+), 1 deletion(-)
diff --git a/drivers/crypto/chel
TLS handler for record transmit and receive.
Create Inline TLS work request and post to FW.
Signed-off-by: Atul Gupta
---
drivers/crypto/chelsio/chtls/chtls_io.c | 1867 +++
1 file changed, 1867 insertions(+)
create mode 100644 drivers/crypto/chelsio/chtls/chtls_io.c
Read FW capability. Read key area size. Dump the TLS record count.
Signed-off-by: Atul Gupta
---
drivers/net/ethernet/chelsio/cxgb4/cxgb4_debugfs.c | 18 +++-
drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c| 32 +--
drivers/net/ethernet/chelsio/cxgb4/cxgb4_uld.h | 7 ++
drivers/net/
Add new uld driver for Inline TLS support. Register ULP for chtls.
Setsockopt to program key on chip. support AES GCM key size 128.
Signed-off-by: Atul Gupta
---
drivers/crypto/chelsio/chtls/chtls_main.c | 574 ++
include/uapi/linux/tls.h | 1 +
2 f
Series for Chelsio Inline TLS driver (chtls.ko)
Driver use the ULP infrastructure to register chtls as Inline TLS ULP.
Chtls use TCP Sockets to transmit and receive TLS record. TCP proto_ops
is extended to offload TLS record.
T6 adapter provides the following features:
-TLS record offload
tls_device structure to register Inline TLS drivers
with net/tls
Signed-off-by: Atul Gupta
---
include/net/tls.h | 24
1 file changed, 24 insertions(+)
diff --git a/include/net/tls.h b/include/net/tls.h
index 936cfc5..6b64510 100644
--- a/include/net/tls.h
+++ b/include
CPL handlers for TLS session, record transmit and receive.
Signed-off-by: Atul Gupta
---
drivers/crypto/chelsio/chtls/chtls_cm.c | 2046 +++
net/ipv4/tcp_minisocks.c|1 +
2 files changed, 2047 insertions(+)
create mode 100644 drivers/crypto/chelsi
Inline TLS state, connection management. Supporting macros definition.
Signed-off-by: Atul Gupta
---
drivers/crypto/chelsio/chtls/chtls.h| 487
drivers/crypto/chelsio/chtls/chtls_cm.h | 203 +
2 files changed, 690 insertions(+)
create mode 100644
Signed-off-by: Atul Gupta
---
include/linux/netdev_features.h | 2 ++
net/core/ethtool.c | 1 +
2 files changed, 3 insertions(+)
diff --git a/include/linux/netdev_features.h b/include/linux/netdev_features.h
index b1b0ca7..e1a33b7 100644
--- a/include/linux/netdev_features.h
+++ b/i
Facility to register Inline TLS drivers to net/tls. Setup
TLS_FULL_HW prot to listen on offload device.
Cases handled
1. Inline TLS device exists, setup prot for TLS_FULL_HW
2. Atleast one Inline TLS exists, sets TLS_FULL_HW. If
non-inline capable device establish connection, move to TLS_SW_TX
3.
Am Donnerstag, 15. Februar 2018, 06:30:36 CET schrieb Harsh Jain:
Hi Harsh,
> On 14-02-2018 18:22, Stephan Mueller wrote:
> > Am Mittwoch, 14. Februar 2018, 06:43:53 CET schrieb Harsh Jain:
> >
> > Hi Harsh,
> >
> >> Patch set is working fine with chelsio Driver.
> >
> > Thank you.
> >
> >> D
On 14-02-2018 18:22, Stephan Mueller wrote:
> Am Mittwoch, 14. Februar 2018, 06:43:53 CET schrieb Harsh Jain:
>
> Hi Harsh,
>
>> Patch set is working fine with chelsio Driver.
> Thank you.
>
>> Do we really need IV locking mechanism for AEAD algo because AEAD algo's
>> don't support Partial mode
Hi Atul,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on cryptodev/master]
[cannot apply to net/master net-next/master v4.16-rc1 next-20180214]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https
From: Markus Elfring
Date: Wed, 14 Feb 2018 22:22:20 +0100
The kfree() function was called in one case by the do_shash() function
during error handling even if the passed variable contained a null pointer.
* Reorder two function calls at the end.
* Add a jump target.
Signed-off-by: Markus Elfr
From: Markus Elfring
Date: Wed, 14 Feb 2018 22:05:11 +0100
Omit an extra message for a memory allocation failure in this function.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring
---
drivers/crypto/bcm/util.c | 1 -
1 file changed, 1 deletion(-)
diff -
From: Markus Elfring
Date: Wed, 14 Feb 2018 22:30:07 +0100
Two update suggestions were taken into account
from static source code analysis.
Markus Elfring (2):
Delete an error message for a failed memory allocation
One function call less after error detection
drivers/crypto/bcm/util.c | 7
From: Markus Elfring
Date: Wed, 14 Feb 2018 21:34:54 +0100
Omit an extra message for a memory allocation failure in this function.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring
---
drivers/crypto/bfin_crc.c | 4 +---
1 file changed, 1 insertion(+), 3
Add an ARM NEON-accelerated implementation of Speck-XTS. It operates on
128-byte chunks at a time, i.e. 8 blocks for Speck128 or 16 blocks for
Speck64. Each 128-byte chunk goes through XTS preprocessing, then is
encrypted/decrypted (doing one cipher round for all the blocks, then the
next round,
Add test vectors for Speck128-XTS, generated in userspace using C code.
The inputs were borrowed from the AES-XTS test vectors.
Both xts(speck128-generic) and xts-speck128-neon pass these tests.
Signed-off-by: Eric Biggers
---
crypto/testmgr.c | 9 +
crypto/testmgr.h | 687 +++
Add test vectors for Speck64-XTS, generated in userspace using C code.
The inputs were borrowed from the AES-XTS test vectors, with key lengths
adjusted.
xts-speck64-neon passes these tests. However, they aren't currently
applicable for the generic XTS template, as that only supports a 128-bit
bl
Hello,
This series adds Speck support to the crypto API, including the Speck128
and Speck64 variants. Speck is a lightweight block cipher that can be
much faster than AES on processors that don't have AES instructions.
We are planning to offer Speck-XTS (probably Speck128/256-XTS) as an
option f
Add a generic implementation of Speck, including the Speck128 and
Speck64 variants. Speck is a lightweight block cipher that can be much
faster than AES on processors that don't have AES instructions.
We are planning to offer Speck-XTS (probably Speck128/256-XTS) as an
option for dm-crypt and fsc
Export the Speck constants and transform context and the ->setkey(),
->encrypt(), and ->decrypt() functions so that they can be reused by the
ARM NEON implementation of Speck-XTS. The generic key expansion code
will be reused because it is not performance-critical and is not
vectorizable, while th
From: Markus Elfring
Date: Wed, 14 Feb 2018 19:14:49 +0100
Add jump targets so that a bit of exception handling can be better reused
at the end of these functions.
Signed-off-by: Markus Elfring
---
drivers/crypto/caam/caamalg.c | 32
drivers/crypto/caam/caamha
From: Markus Elfring
Date: Wed, 14 Feb 2018 18:22:38 +0100
Omit an extra message for a memory allocation failure in these functions.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring
---
drivers/crypto/caam/caamalg.c | 6 +-
drivers/crypto/caam/caam
From: Markus Elfring
Date: Wed, 14 Feb 2018 19:23:45 +0100
Two update suggestions were taken into account
from static source code analysis.
Markus Elfring (2):
Delete an error message for a failed memory allocation in seven functions
Use common error handling code in four functions
drivers
Reduce code duplication by introducting GCM_INIT macro. This macro
will also be exposed as a function for implementing scatter/gather
support, since INIT only needs to be called once for the full
operation.
Signed-off-by: Dave Watson
---
arch/x86/crypto/aesni-intel_asm.S | 84 +++---
Make a macro for the main encode/decode routine. Only a small handful
of lines differ for enc and dec. This will also become the main
scatter/gather update routine.
Signed-off-by: Dave Watson
---
arch/x86/crypto/aesni-intel_asm.S | 293 +++---
1 file changed, 1
Merge encode and decode tag calculations in GCM_COMPLETE macro.
Scatter/gather routines will call this once at the end of encryption
or decryption.
Signed-off-by: Dave Watson
---
arch/x86/crypto/aesni-intel_asm.S | 172 ++
1 file changed, 63 insertions(+), 109
AAD hash only needs to be calculated once for each scatter/gather operation.
Move it to its own macro, and call it from GCM_INIT instead of
INITIAL_BLOCKS.
Signed-off-by: Dave Watson
---
arch/x86/crypto/aesni-intel_asm.S | 71 ---
1 file changed, 43 insertions
Fill in aadhash, aadlen, pblocklen, curcount with appropriate values.
pblocklen, aadhash, and pblockenckey are also updated at the end
of each scatter/gather operation, to be carried over to the next
operation.
Signed-off-by: Dave Watson
---
arch/x86/crypto/aesni-intel_asm.S | 51 +++
Introduce a gcm_context_data struct that will be used to pass
context data between scatter/gather update calls. It is passed
as the second argument (after crypto keys), other args are
renumbered.
Signed-off-by: Dave Watson
---
arch/x86/crypto/aesni-intel_asm.S | 115 +--
Prepare to handle partial blocks between scatter/gather calls.
For the last partial block, we only want to calculate the aadhash
in GCM_COMPLETE, and a new partial block macro will handle both
aadhash update and encrypting partial blocks between calls.
Signed-off-by: Dave Watson
---
arch/x86/cry
Add gcmaes_crypt_by_sg routine, that will do scatter/gather
by sg. Either src or dst may contain multiple buffers, so
iterate over both at the same time if they are different.
If the input is the same as the output, iterate only over one.
Currently both the AAD and TAG must be linear, so copy them
The asm macros are all set up now, introduce entry points.
GCM_INIT and GCM_COMPLETE have arguments supplied, so that
the new scatter/gather entry points don't have to take all the
arguments, and only the ones they need.
Signed-off-by: Dave Watson
---
arch/x86/crypto/aesni-intel_asm.S | 116 ++
We can fast-path any < 16 byte read if the full message is > 16 bytes,
and shift over by the appropriate amount. Usually we are
reading > 16 bytes, so this should be faster than the READ_PARTIAL
macro introduced in b20209c91e2 for the average case.
Signed-off-by: Dave Watson
---
arch/x86/crypto
Before this diff, multiple calls to GCM_ENC_DEC will
succeed, but only if all calls are a multiple of 16 bytes.
Handle partial blocks at the start of GCM_ENC_DEC, and update
aadhash as appropriate.
The data offset %r11 is also updated after the partial block.
Signed-off-by: Dave Watson
---
arc
HashKey computation only needs to happen once per scatter/gather operation,
save it between calls in gcm_context struct instead of on the stack.
Since the asm no longer stores anything on the stack, we can use
%rsp directly, and clean up the frame save/restore macros a bit.
Hashkeys actually only
Use macro operations to merge implemetations of INITIAL_BLOCKS,
since they differ by only a small handful of lines.
Use macro counter \@ to simplify implementation.
Signed-off-by: Dave Watson
---
arch/x86/crypto/aesni-intel_asm.S | 298 ++
1 file changed, 48
Macro-ify function save and restore. These will be used in new functions
added for scatter/gather update operations.
Signed-off-by: Dave Watson
---
arch/x86/crypto/aesni-intel_asm.S | 53 ++-
1 file changed, 24 insertions(+), 29 deletions(-)
diff --git a/arc
This patch set refactors the x86 aes/gcm SSE crypto routines to
support true scatter/gather by adding gcm_enc/dec_update methods.
The layout is:
* First 5 patches refactor the code to use macros, so changes only
need to be applied once for encode and decode. There should be no
functional cha
On Wed, Feb 14, 2018 at 11:17 AM, SF Markus Elfring
wrote:
> From: Markus Elfring
> Date: Wed, 14 Feb 2018 17:05:13 +0100
>
> Omit an extra message for a memory allocation failure in this function.
>
> This issue was detected by using the Coccinelle software.
>
> Signed-off-by: Markus Elfring
R
From: Markus Elfring
Date: Wed, 14 Feb 2018 17:05:13 +0100
Omit an extra message for a memory allocation failure in this function.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring
---
drivers/crypto/nx/nx-842-pseries.c | 5 ++---
1 file changed, 2 insert
On Fri, Jan 26, 2018 at 08:15:32PM +0100, Corentin Labbe wrote:
> This patch convert the driver to the new crypto engine API.
>
> Signed-off-by: Corentin Labbe
Acked-by: Michael S. Tsirkin
Pls queue when/if rest of changes go in.
> ---
> drivers/crypto/virtio/virtio_crypto_algs.c | 16
From: Markus Elfring
Date: Wed, 14 Feb 2018 16:12:05 +0100
Replace the specification of data structures by pointer dereferences
as the parameter for the operator "sizeof" to make the corresponding size
determination a bit safer according to the Linux coding style convention.
This issue was detec
From: Markus Elfring
Date: Wed, 14 Feb 2018 16:00:33 +0100
Omit an extra message for a memory allocation failure in these functions.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring
---
drivers/crypto/omap-aes.c | 5 ++---
drivers/crypto/omap-des.c | 5
From: Markus Elfring
Date: Wed, 14 Feb 2018 16:18:19 +0100
Two update suggestions were taken into account
from static source code analysis.
Markus Elfring (2):
Delete error messages for a failed memory allocation
Improve size determinations
drivers/crypto/omap-aes.c | 8 +++-
drivers/
Hi crypto folk,
On Fri, Feb 09, 2018 at 10:11:06PM +, James Hogan wrote:
> From: Marcin Nowakowski
>
> This module registers crc32 and crc32c algorithms that use the
> optional CRC32[bhwd] and CRC32C[bhwd] instructions in MIPSr6 cores.
>
> Signed-off-by: Marcin Nowakowski
> Signed-off-by:
From: Markus Elfring
Date: Wed, 14 Feb 2018 14:14:05 +0100
Replace the specification of a data structure by a pointer dereference
as the parameter for the operator "sizeof" to make the corresponding size
determination a bit safer according to the Linux coding style convention.
This issue was det
From: Markus Elfring
Date: Wed, 14 Feb 2018 14:10:03 +0100
Omit an extra message for a memory allocation failure in this function.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring
---
drivers/crypto/sahara.c | 4 +---
1 file changed, 1 insertion(+), 3 de
Adding my tested-by for the AEAD part which is new in v2
On 26/01/18 20:15, Corentin Labbe wrote:
> The crypto engine could actually only enqueue hash and ablkcipher request.
> This patch permit it to enqueue any type of crypto_async_request.
>
> Signed-off-by: Corentin Labbe
> Tested-by: Fabien
From: Markus Elfring
Date: Wed, 14 Feb 2018 14:30:28 +0100
Two update suggestions were taken into account
from static source code analysis.
Markus Elfring (2):
Delete an error message for a failed memory allocation
Improve a size determination
drivers/crypto/sahara.c | 6 ++
1 file cha
Am Mittwoch, 14. Februar 2018, 06:43:53 CET schrieb Harsh Jain:
Hi Harsh,
>
> Patch set is working fine with chelsio Driver.
Thank you.
> Do we really need IV locking mechanism for AEAD algo because AEAD algo's
> don't support Partial mode operation and Driver are not updating(atleast
> Chelsi
Am Mittwoch, 14. Februar 2018, 06:50:38 CET schrieb Harsh Jain:
Hi Harsh,
> On 10-02-2018 03:34, Stephan Müller wrote:
> > Crypto drivers may implement a streamlined serialization support for AIO
> > requests that is reported by the CRYPTO_ALG_SERIALIZES_IV_ACCESS flag to
> > the crypto user. Whe
From: Markus Elfring
Date: Wed, 14 Feb 2018 10:56:38 +0100
Two local variables will eventually be set to appropriate pointers
a bit later. Thus omit their explicit initialisation at the beginning.
Signed-off-by: Markus Elfring
---
drivers/crypto/ux500/cryp/cryp_core.c | 4 ++--
1 file changed,
From: Markus Elfring
Date: Wed, 14 Feb 2018 10:47:31 +0100
Replace the function name in this error message so that the same name
is mentioned according to what was called before.
Signed-off-by: Markus Elfring
---
drivers/crypto/ux500/cryp/cryp_core.c | 2 +-
1 file changed, 1 insertion(+), 1 d
From: Markus Elfring
Date: Wed, 14 Feb 2018 10:38:44 +0100
The local variable "cryp_error" was used only for two condition checks.
* Check the return values from these function calls directly instead.
* Delete this variable which became unnecessary with this refactoring.
Signed-off-by: Markus
From: Markus Elfring
Date: Wed, 14 Feb 2018 10:12:38 +0100
Omit an extra message for a memory allocation failure in this function.
This issue was detected by using the Coccinelle software.
Signed-off-by: Markus Elfring
---
drivers/crypto/ux500/cryp/cryp_core.c | 1 -
1 file changed, 1 deletio
From: Markus Elfring
Date: Wed, 14 Feb 2018 11:12:34 +0100
A few update suggestions were taken into account
from static source code analysis.
Markus Elfring (4):
Delete an error message for a failed memory allocation
Adjust two condition checks
Adjust an error message
Delete two unnecess
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