RE: [RFC crypto v3 8/9] chtls: Register the ULP

@Dave Watson, Did you get chance to look at my response? What I was referring is that passing "tls" ulp type in setsockopt may be insufficient to make the decision when multi HW assist Inline TLS solution exists. Some HW may go beyond defining sendmsg/sendpage of the prot and require additional

Re: [PATCH] crypto: sha1-mb - remove HASH_FIRST flag

>> >> I suppose this will be okay as we are really doing the initialization in >> sha1_mb_init. Megha is now maintaining this code. Copying her >> so she can do some verification of this change. >> > > Please update the MAINTAINERS file so that people know who to Cc on patches. > > Eric > He

Re: [PATCH v2] tpm: Move Linux RNG connection to hwrng

On Sat, Jan 27, 2018 at 12:20:18PM +0530, PrasannaKumar Muralidharan wrote: > Hi Jarkko, > > On 17 November 2017 at 19:27, Jarkko Sakkinen > wrote: > > On Fri, Nov 17, 2017 at 03:28:53PM +0200, Jarkko Sakkinen wrote: > > > > At least signed-off-by from PrassanaKumar is missing from the 2nd > > co

[PATCH 1/5] hwrng: stm32 - add reset during probe

Avoid issue when probing the RNG without reset if bad status has been detected previously Signed-off-by: Lionel Debieve --- drivers/char/hw_random/stm32-rng.c | 9 + 1 file changed, 9 insertions(+) diff --git a/drivers/char/hw_random/stm32-rng.c b/drivers/char/hw_random/stm32-rng.c ind

[PATCH 4/5] dt-bindings: rng: add clock detection error for stm32

Add optional property to enable the clock detection error on rng block. It is used to allow slow clock source which give correct entropy for rng. Signed-off-by: Lionel Debieve --- Documentation/devicetree/bindings/rng/st,stm32-rng.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documenta

[PATCH 0/5] hwrng: stm32 - Improvement for stm32-rng

This set of patches add extended functionalities for stm32 rng driver. Patch #1 includes a reset during probe to avoid any error status which can occur during bootup process and keep safe rng integrity. Patch #3 adds a new property to manage the clock error detection feature which can be disabled

[PATCH 2/5] dt-bindings: rng: add reset node for stm32

Adding optional resets property for rng. Signed-off-by: Lionel Debieve --- Documentation/devicetree/bindings/rng/st,stm32-rng.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/rng/st,stm32-rng.txt b/Documentation/devicetree/bindings/rng/st,stm32-rng.tx

[PATCH 3/5] hwrng: stm32 - allow disable clock error detection

Add a new property that allow to disable the clock error detection which is required when the clock source selected is out of specification (which is not mandatory). Signed-off-by: Lionel Debieve --- drivers/char/hw_random/stm32-rng.c | 10 +- 1 file changed, 9 insertions(+), 1 deletion(

Crypto Update for 4.16

Hi Linus: Here is the crypto update for 4.16: API: - Enforce the setting of keys for keyed aead/hash/skcipher algorithms. - Add multibuf speed tests in tcrypt. Algorithms: - Improve performance of sha3-generic. - Add native sha512 support on arm64. - Add v8.2 Crypto Extentions version of sha3

[PATCH 2/3] crypto: stm32/hash: fix performance issues

From: Lionel Debieve Fixing bugs link to stress tests. Bad results are detected during testmgr selftests executing in a faster environment. bufcnt value may be resetted and false IT are sometimes detected. Signed-off-by: Lionel Debieve --- drivers/crypto/stm32/stm32-hash.c | 8 ++-- 1 file

[PATCH 1/3] crypto: stm32/hash: avoid error if maxburst not defined

From: Lionel Debieve dma-maxburst is an optional value and must not return error in case of dma not used (or max-burst not defined). Signed-off-by: Lionel Debieve --- drivers/crypto/stm32/stm32-hash.c | 11 ++- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/crypt

[PATCH 0/3] crypto: stm32/hash: Correction to improve robustness

From: Lionel Debieve Hi, This patch serie will improve global robustness for stm32-hash driver. Patch #1 is fixing dma-burst issue when configuration is not set. Patch #2 solves issue that occurs when irq append during final req processing. Patch #3 is fixing an issue that have been introduced

[PATCH 3/3] crypto: stm32/hash: rework padding length

From: Lionel Debieve Due to another patch, the dma fails when padding is needed as the given length is not correct. Signed-off-by: Lionel Debieve --- drivers/crypto/stm32/stm32-hash.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/crypto/stm32/stm32-hash.c b/drive

Re: [PATCH][next] hwrng: exynos: check for -ve error return from readl_poll_timeout

It was <2018-01-12 pią 17:30>, when Colin King wrote: > From: Colin Ian King > > Currently, the return from readl_poll_timeout is being assigned to > a u32 and this is being checked for a -ve return which is always > false since a u32 cannot be less than zero. Fix this by changing > val to an int

Re: [PATCH RFC 0/3] API for 128-bit IO access

On Fri, Jan 26, 2018 at 06:11:49PM +, Will Deacon wrote: > On Fri, Jan 26, 2018 at 12:05:42PM +0300, Yury Norov wrote: > > On Wed, Jan 24, 2018 at 10:22:13AM +, Will Deacon wrote: > > > On Wed, Jan 24, 2018 at 12:05:16PM +0300, Yury Norov wrote: > > > > This series adds API for 128-bit memo

[PATCH 2/3] crypto: caam - prepare for gcm(aes) support over QI interface

Update gcm(aes) descriptors (generic, rfc4106 and rfc4543) such that they would also work when submitted via the QI interface. Signed-off-by: Horia Geantă --- drivers/crypto/caam/caamalg.c | 19 +++-- drivers/crypto/caam/caamalg_desc.c | 165 ++--- drivers/c

[PATCH 3/3] crypto: caam/qi - add GCM support

Add support for AES working in Galois Counter Mode. The following algorithms are added: gcm(aes) rfc4106(gcm(aes)) rfc4543(gcm(aes)) There is a limitation related to IV size, similar to the one present in SW implementation (crypto/gcm.c): The only IV size allowed is 12 bytes. It will be padded by

[PATCH 1/3] crypto: caam/qi - return -EBADMSG for ICV check failure

Crypto drivers are expected to return -EBADMSG in case of ICV check (authentication) failure. In this case it also makes sense to suppress the error message in the QI dequeue callback. Signed-off-by: Horia Geantă --- drivers/crypto/caam/caamalg_qi.c | 12 +++- drivers/crypto/caam/qi.c