On Sat, 9 Sep 2017, Srishti Sharma wrote:
> On Sat, Sep 9, 2017 at 2:28 AM, Julia Lawall wrote:
> >
> >
> > On Sat, 9 Sep 2017, Srishti Sharma wrote:
> >
> >> Merge the assignment and return statements to return the value
> >> directly. Done using coccinelle.
> >>
> >> @@
> >> local idexpressio
On Sat, 9 Sep 2017, Srishti Sharma wrote:
> Merge the assignment and return statements to return the value
> directly. Done using coccinelle.
>
> @@
> local idexpression ret;
> expression e;
> @@
>
> -ret =
> +return
> e;
> -return ret;
>
> Signed-off-by: Srishti Sharma
> ---
> Changes in
Am Samstag, 9. September 2017, 00:20:50 CEST schrieb Stephan Müller:
Hi Herbert,
> walk->sg = sg;
> - walk->offset = sg->offset;
> + if (sg)
> + walk->offset = sg->offset;
> + else
> + walk->offset = 0;
> }
After running more fuzzing tests, I now cause
Am Donnerstag, 7. September 2017, 08:01:08 CEST schrieb Herbert Xu:
Hi Herbert,
> On Thu, Sep 07, 2017 at 07:48:53AM +0200, Stephan Müller wrote:
> > There is already such check:
> >
> > static inline int crypto_aead_decrypt(struct aead_request *req)
> > {
> >
> > struct crypto_aead *ae
Merge the assignment and return statements to return the value
directly. Done using coccinelle.
@@
local idexpression ret;
expression e;
@@
-ret =
+return
e;
-return ret;
Signed-off-by: Srishti Sharma
---
Changes in v3:
-Edit commit message so that it respects 80 character limit.
-Remove
On Sat, Sep 9, 2017 at 2:28 AM, Julia Lawall wrote:
>
>
> On Sat, 9 Sep 2017, Srishti Sharma wrote:
>
>> Merge the assignment and return statements to return the value
>> directly. Done using coccinelle.
>>
>> @@
>> local idexpression ret;
>> expression e;
>> @@
>>
>> -ret =
>> +return
>> e;
On Sat, 9 Sep 2017, Srishti Sharma wrote:
> Merge the assignment and return statements to return the value
> directly. Done using coccinelle.
>
> @@
> local idexpression ret;
> expression e;
> @@
>
> -ret =
> +return
> e;
> -return ret;
>
> Signed-off-by: Srishti Sharma
> ---
> Changes in
Merge the assignment and return statements to return the value
directly. Done using coccinelle.
@@
local idexpression ret;
expression e;
@@
-ret =
+return
e;
-return ret;
Signed-off-by: Srishti Sharma
---
Changes in v2:
- Edit commit message so that it respects the 80 character limit.
d
On Sat, 9 Sep 2017, Srishti Sharma wrote:
> On Sat, Sep 9, 2017 at 1:42 AM, Julia Lawall wrote:
> >
> >
> > On Sat, 9 Sep 2017, Srishti Sharma wrote:
> >
> >> Return the return value of a function directly, instead of first saving it
> >> in a variable and then returning it. This change was ma
On Sat, Sep 9, 2017 at 1:42 AM, Julia Lawall wrote:
>
>
> On Sat, 9 Sep 2017, Srishti Sharma wrote:
>
>> Return the return value of a function directly, instead of first saving it
>> in a variable and then returning it. This change was made using the following
>
> Your commit message should respe
On Sat, 9 Sep 2017, Srishti Sharma wrote:
> Return the return value of a function directly, instead of first saving it in
> a variable and then returning it. This change was made using the following
Your commit message should respect the 80 character limit. The above is
one very long line.
>
Return the return value of a function directly, instead of first saving it in a
variable and then returning it. This change was made using the following
semantic patch by coccinelle.
@@
local idexpression ret;
expression e;
@@
-ret =
+return
e;
-return ret;
Signed-off-by: Srishti Sharma
-
If the algorithm we're parallelizing is asynchronous we might change
CPUs between padata_do_parallel() and padata_do_serial(). However, we
don't expect this to happen as we need to enqueue the padata object into
the per-cpu reorder queue we took it from, i.e. the same-cpu's parallel
queue.
Ensure
The reorder timer function runs on the CPU where the timer interrupt was
handled which is not necessarily one of the CPUs of the 'pcpu' CPU mask
set.
Ensure the padata_reorder() callback runs on the correct CPU, which is
one in the 'pcpu' CPU mask set and, preferrably, the next expected one.
Do so
The parallel queue per-cpu data structure gets initialized only for CPUs
in the 'pcpu' CPU mask set. This is not sufficient as the reorder timer
may run on a different CPU and might wrongly decide it's the target CPU
for the next reorder item as per-cpu memory gets memset(0) and we might
be waiting
Hi Steffen, Herbert,
this series solves multiple issues of padata I ran into while trying to
make use of pcrypt for IPsec.
The first issue is that the reorder timer callback may run on a CPU that
isn't part of the parallel set, as it runs on the CPU where the timer
interrupt gets handled. As a re
On Thu, Sep 07, 2017 at 11:26:47PM +0200, Ingo Molnar wrote:
>
> * Eric Biggers wrote:
>
> > On Thu, Sep 07, 2017 at 09:15:34AM +0200, Ingo Molnar wrote:
> > >
> > > * Eric Biggers wrote:
> > >
> > > > Thanks for fixing these! I don't have time to review these in detail,
> > > > but I ran
>
On 09/08/2017 03:40 AM, Borislav Petkov wrote:
On Thu, Sep 07, 2017 at 05:19:32PM -0500, Brijesh Singh wrote:
At high level, AMD-SP (AMD Secure Processor) (i.e CCP driver) will provide the
support for CCP, SEV and TEE FW commands.
+--- CCP
|
AMD-SP --|
|
On 09/08/2017 03:40 AM, Borislav Petkov wrote:
On Thu, Sep 07, 2017 at 05:19:32PM -0500, Brijesh Singh wrote:
At high level, AMD-SP (AMD Secure Processor) (i.e CCP driver) will provide the
support for CCP, SEV and TEE FW commands.
+--- CCP
|
AMD-SP --|
|
Am Freitag, 8. September 2017, 12:47:54 CEST schrieb Harsh Jain:
Hi Harsh,
> Hi,
>
> XTS template does not seems updating the IV after request completion. Same
> output if we run belwo command in loop
>
> [root@heptagon test]# ./kcapi -x 1 -d 4 -s -e -c "xts(aes)" -i
> 7fbc02ebf5b93322329df9bf
Hi,
XTS template does not seems updating the IV after request completion. Same
output if we run belwo command in loop
[root@heptagon test]# ./kcapi -x 1 -d 4 -s -e -c "xts(aes)" -i
7fbc02ebf5b93322329df9bfccb635af -k
8d7dd9b0170ce0b5f2f8e1aa768e01e91da8bfc67fd486d081b28254c99eb423 -p `perl -e
On Thu, Sep 07, 2017 at 05:19:32PM -0500, Brijesh Singh wrote:
> At high level, AMD-SP (AMD Secure Processor) (i.e CCP driver) will provide the
> support for CCP, SEV and TEE FW commands.
>
>
> +--- CCP
> |
> AMD-SP --|
> |+--- SEV
> ||
On Thu, Sep 07, 2017 at 06:15:55PM -0500, Gary R Hook wrote:
> I would prefer that we not shorten this. The prior incarnation,
> ccp_alloc_struct(), has/had been around for a while. And there are a
> number of similarly named allocation functions in the driver that we
> like to keep sorted. If anyt
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