Re: [PATCH v8 0/4] crypto: add algif_akcipher user space API

2017-08-29 Thread Tudor Ambarus
Hi, Herbert, all, akcipher can work with its own internal keys, now that we have crypto accelerators that can generate keys that never leave the hardware. Going through the kernel's key subsystem seems superfluous in this case. I also understand the need of going through the kernel's key subsyst

Re: [PATCH V3 6/6] crypto/nx: Add P9 NX support for 842 compression engine

2017-08-29 Thread Haren Myneni
On 08/29/2017 02:57 PM, Benjamin Herrenschmidt wrote: > On Tue, 2017-08-29 at 14:54 -0700, Haren Myneni wrote: >> Opening send window for each crypto transform (crypto_alloc, >> compression/decompression, ..., crypto_free) so that does not have to >> wait for the previous copy/paste complete. VAS w

Re: [PATCH V3 6/6] crypto/nx: Add P9 NX support for 842 compression engine

2017-08-29 Thread Benjamin Herrenschmidt
On Tue, 2017-08-29 at 14:54 -0700, Haren Myneni wrote: > Opening send window for each crypto transform (crypto_alloc, > compression/decompression, ..., crypto_free) so that does not have to > wait for the previous copy/paste complete. VAS will map send and > receive windows, and can cache in send w

Re: [PATCH V3 6/6] crypto/nx: Add P9 NX support for 842 compression engine

2017-08-29 Thread Haren Myneni
On 08/29/2017 02:23 PM, Benjamin Herrenschmidt wrote: > On Tue, 2017-08-29 at 09:58 -0400, Dan Streetman wrote: >>> + >>> + ret = -EINVAL; >>> + if (coproc && coproc->vas.rxwin) { >>> + wmem->txwin = nx842_alloc_txwin(coproc); >> >> this is wrong. the workmem is scratch m

Re: [PATCH V3 6/6] crypto/nx: Add P9 NX support for 842 compression engine

2017-08-29 Thread Benjamin Herrenschmidt
On Tue, 2017-08-29 at 09:58 -0400, Dan Streetman wrote: > > + > > + ret = -EINVAL; > > + if (coproc && coproc->vas.rxwin) { > > + wmem->txwin = nx842_alloc_txwin(coproc); > > this is wrong. the workmem is scratch memory that's valid only for > the duration of a single op

[PATCH 01/12] x86/crypto: Fix RBP usage in blowfish-x86_64-asm_64.S

2017-08-29 Thread Josh Poimboeuf
Using RBP as a temporary register breaks frame pointer convention and breaks stack traces when unwinding from an interrupt in the crypto code. Use R12 instead of RBP. R12 can't be used as the RT0 register because of x86 instruction encoding limitations. So use R12 for CTX and RDI for CTX. This

[PATCH 03/12] x86/crypto: Fix RBP usage in cast5-avx-x86_64-asm_64.S

2017-08-29 Thread Josh Poimboeuf
Using RBP as a temporary register breaks frame pointer convention and breaks stack traces when unwinding from an interrupt in the crypto code. Use R15 instead of RBP. R15 can't be used as the RID1 register because of x86 instruction encoding limitations. So use R15 for CTX and RDI for CTX. This

[PATCH 02/12] x86/crypto: Fix RBP usage in camellia-x86_64-asm_64.S

2017-08-29 Thread Josh Poimboeuf
Using RBP as a temporary register breaks frame pointer convention and breaks stack traces when unwinding from an interrupt in the crypto code. Use R12 instead of RBP. Both are callee-saved registers, so the substitution is straightforward. Reported-by: Eric Biggers Reported-by: Peter Zijlstra

[PATCH 04/12] x86/crypto: Fix RBP usage in cast6-avx-x86_64-asm_64.S

2017-08-29 Thread Josh Poimboeuf
Using RBP as a temporary register breaks frame pointer convention and breaks stack traces when unwinding from an interrupt in the crypto code. Use R15 instead of RBP. R15 can't be used as the RID1 register because of x86 instruction encoding limitations. So use R15 for CTX and RDI for CTX. This

[PATCH 06/12] x86/crypto: Fix RBP usage in sha1_avx2_x86_64_asm.S

2017-08-29 Thread Josh Poimboeuf
Using RBP as a temporary register breaks frame pointer convention and breaks stack traces when unwinding from an interrupt in the crypto code. Use R11 instead of RBP. Since R11 isn't a callee-saved register, it doesn't need to be saved and restored on the stack. Reported-by: Eric Biggers Report

[PATCH 05/12] x86/crypto: Fix RBP usage in des3_ede-asm_64.S

2017-08-29 Thread Josh Poimboeuf
Using RBP as a temporary register breaks frame pointer convention and breaks stack traces when unwinding from an interrupt in the crypto code. Use RSI instead of RBP for RT1. Since RSI is also used as a the 'dst' function argument, it needs to be saved on the stack until the argument is needed.

[PATCH 09/12] x86/crypto: Fix RBP usage in sha256-avx2-asm.S

2017-08-29 Thread Josh Poimboeuf
Using RBP as a temporary register breaks frame pointer convention and breaks stack traces when unwinding from an interrupt in the crypto code. Use R12 instead of RBP for the TBL register. Since R12 is also used as another temporary register (T1), it gets clobbered in each round of computation. S

[PATCH 10/12] x86/crypto: Fix RBP usage in sha256-ssse3-asm.S

2017-08-29 Thread Josh Poimboeuf
Using RBP as a temporary register breaks frame pointer convention and breaks stack traces when unwinding from an interrupt in the crypto code. Swap the usages of R12 and RBP. Use R12 for the TBL register, and use RBP to store the pre-aligned stack pointer. Reported-by: Eric Biggers Reported-by:

[PATCH 07/12] x86/crypto: Fix RBP usage in sha1_ssse3_asm.S

2017-08-29 Thread Josh Poimboeuf
Using RBP as a temporary register breaks frame pointer convention and breaks stack traces when unwinding from an interrupt in the crypto code. Swap the usages of R12 and RBP. Use R12 for the REG_D register, and use RBP to store the pre-aligned stack pointer. Reported-by: Eric Biggers Reported-b

[PATCH 11/12] x86/crypto: Fix RBP usage in sha512-avx2-asm.S

2017-08-29 Thread Josh Poimboeuf
Using RBP as a temporary register breaks frame pointer convention and breaks stack traces when unwinding from an interrupt in the crypto code. Use R12 instead of RBP for the TBL register. Since R12 is also used as another temporary register (T1), it gets clobbered in each round of computation. S

[PATCH 12/12] x86/crypto: Fix RBP usage in twofish-avx-x86_64-asm_64.S

2017-08-29 Thread Josh Poimboeuf
Using RBP as a temporary register breaks frame pointer convention and breaks stack traces when unwinding from an interrupt in the crypto code. Use R13 instead of RBP. Both are callee-saved registers, so the substitution is straightforward. Reported-by: Eric Biggers Reported-by: Peter Zijlstra

[PATCH 08/12] x86/crypto: Fix RBP usage in sha256-avx-asm.S

2017-08-29 Thread Josh Poimboeuf
Using RBP as a temporary register breaks frame pointer convention and breaks stack traces when unwinding from an interrupt in the crypto code. Swap the usages of R12 and RBP. Use R12 for the TBL register, and use RBP to store the pre-aligned stack pointer. Reported-by: Eric Biggers Reported-by:

[PATCH 00/12] x86/crypto: Fix RBP usage in several crypto .S files

2017-08-29 Thread Josh Poimboeuf
Many of the x86 crypto functions use RBP as a temporary register. This breaks frame pointer convention, and breaks stack traces when unwinding from an interrupt in the crypto code. Convert most* of them to leave RBP alone. These pass the crypto boot tests for me. Any further testing would be ap

Re: [PATCH V3 6/6] crypto/nx: Add P9 NX support for 842 compression engine

2017-08-29 Thread Dan Streetman
On Sat, Jul 22, 2017 at 1:01 AM, Haren Myneni wrote: > > This patch adds P9 NX support for 842 compression engine. Virtual > Accelerator Switchboard (VAS) is used to access 842 engine on P9. > > For each NX engine per chip, setup receive window using > vas_rx_win_open() which configures RxFIFo wit

Re: [PATCH V3 6/6] crypto/nx: Add P9 NX support for 842 compression engine

2017-08-29 Thread Dan Streetman
On Mon, Aug 28, 2017 at 7:25 PM, Michael Ellerman wrote: > Hi Haren, > > Some comments inline ... > > Haren Myneni writes: > >> diff --git a/drivers/crypto/nx/nx-842-powernv.c >> b/drivers/crypto/nx/nx-842-powernv.c >> index c0dd4c7e17d3..13089a0b9dfa 100644 >> --- a/drivers/crypto/nx/nx-842-pow

[PATCH] crypto: brcm - Explicity ACK mailbox message

2017-08-29 Thread Raveendra Padasalagi
Add support to explicity ACK mailbox message because after sending message we can know the send status via error attribute of brcm_message. This is needed to support "txdone_ack" supported in mailbox controller driver. Fixes: 9d12ba86f818 ("crypto: brcm - Add Broadcom SPU driver") Signed-off-by: