On Wed, Jul 19, 2017 at 08:22:18AM +0200, Stephan Müller wrote:
> Am Dienstag, 18. Juli 2017, 23:08:16 CEST schrieb Theodore Ts'o:
>
> Hi Theodore,
> >
> > I've been trying to take the best features and suggestions from your
> > proposal and integrating them into /dev/random already. Things that
Am Mittwoch, 19. Juli 2017, 03:51:33 CEST schrieb Theodore Ts'o:
Hi Theodore,
> If the real unpredictability is really coming from the interrupts
> changing the state of the CPU microarchitecture, the real question is
> how many interrupts do you need before you consider things
> "unpredictable"
Am Dienstag, 18. Juli 2017, 23:08:16 CEST schrieb Theodore Ts'o:
Hi Theodore,
>
> I've been trying to take the best features and suggestions from your
> proposal and integrating them into /dev/random already. Things that
> I've chosen not take is basically because I disbelieve that the Jitter
>
Logan Gunthorpe writes:
> Subsequent patches in this series makes use of the readq and writeq
> defines in iomap.h. However, as is, they get missed on the powerpc
> platform seeing the include comes before the define. This patch
> moves the include down to fix this.
>
> Signed-off-by: Logan Gunth
Need to address few issues in the patch.
So NAKing this patch. Will send out re-vised version.
Regards,
Raveendra
> -Original Message-
> From: Raveendra Padasalagi [mailto:raveendra.padasal...@broadcom.com]
> Sent: 13 July 2017 13:58
> To: Herbert Xu; David S. Miller; Rob Rice; Scott Brand
On Tue, Jul 18, 2017 at 09:00:10PM -0400, Sandy Harris wrote:
> The only really good solution I know of is to find a way to provide a
> chunk of randomness early in the boot process. John Denker has a good
> discussion of doing this by modifying the kernel image & Ted talks of
> doing it via the bo
On Tue, 2017-07-18 at 17:52 -0700, Tim Chen wrote:
> On 07/17/2017 10:41 PM, Herbert Xu wrote:
> > On Tue, Jun 27, 2017 at 05:26:13PM -0700, Megha Dey wrote:
> >>
> >> +static void completion_callback(struct mcryptd_skcipher_request_ctx *rctx,
> >> + struct mcryptd_alg_cstate *
On Tue, Jul 18, 2017 at 5:08 PM, Theodore Ts'o wrote:
> I've been trying to take the best features and suggestions from your
> proposal and integrating them into /dev/random already.
A good approach.
> Things that I've chosen not take is basically because I disbelieve
> that the Jitter RNG is v
On 07/17/2017 10:41 PM, Herbert Xu wrote:
> On Tue, Jun 27, 2017 at 05:26:13PM -0700, Megha Dey wrote:
>>
>> +static void completion_callback(struct mcryptd_skcipher_request_ctx *rctx,
>> +struct mcryptd_alg_cstate *cstate,
>> +int err)
>> +{
>> +
Remove unnecessary static on local variable dd. Such variable
is initialized before being used, on every execution path throughout
the function. The static has no benefit and, removing it reduces the
object file size.
This issue was detected using Coccinelle and the following semantic patch:
https
Remove unnecessary static on local variable hdev. Such variable
is initialized before being used, on every execution path throughout
the function. The static has no benefit and, removing it reduces the
object file size.
This issue was detected using Coccinelle and the following semantic patch:
htt
Remove unnecessary static on local variable sha_dd. Such variable
is initialized before being used, on every execution path throughout
the function. The static has no benefit and, removing it reduces the
object file size.
This issue was detected using Coccinelle and the following semantic patch:
h
Remove unnecessary static on local variable tdes_dd. Such variable
is initialized before being used, on every execution path throughout
the function. The static has no benefit and, removing it reduces the
object file size.
This issue was detected using Coccinelle and the following semantic patch:
Now that we have a custom printf format specifier, convert users of
full_name to use %pOF instead. This is preparation to remove storing
of the full path string for each node.
Signed-off-by: Rob Herring
Cc: Herbert Xu
Cc: "David S. Miller"
Cc: linux-crypto@vger.kernel.org
---
drivers/crypto/n2
From: Rob Herring
Date: Tue, 18 Jul 2017 16:42:56 -0500
> Now that we have a custom printf format specifier, convert users of
> full_name to use %pOF instead. This is preparation to remove storing
> of the full path string for each node.
>
> Signed-off-by: Rob Herring
Acked-by: David S. Miller
On Tue, Jul 18, 2017 at 04:37:11PM +0200, Stephan Müller wrote:
> >
> > > I have stated the core concerns I have with random.c in [1]. To remedy
> > > these core concerns, major changes to random.c are needed. With the past
> > > experience, I would doubt that I get the changes into random.c.
> >
Fixes checkpatch.pl alignment warnings.
Signed-off-by: Simon Sandström
---
drivers/staging/ccree/ssi_cipher.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/staging/ccree/ssi_cipher.c
b/drivers/staging/ccree/ssi_cipher.c
index bfe9b1ccbf37..aec7c1480336 100644
---
Here are a few more patches that fixes alignment issues in
staging/ccree. Includes the patches that I sent previously which could
not be applied plus a few more fixes for issues that I found. These
patches should fix all remaining alignment warnings reported by
checkpatch.pl in staging/ccree.
- Si
Fixes checkpatch.pl alignment warnings.
Signed-off-by: Simon Sandström
---
drivers/staging/ccree/ssi_request_mgr.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/staging/ccree/ssi_request_mgr.c
b/drivers/staging/ccree/ssi_request_mgr.c
index 3f39150cda4f..2eda82f
Fixes checkpatch.pl alignment warnings.
Signed-off-by: Simon Sandström
---
drivers/staging/ccree/ssi_hash.c | 105 +--
1 file changed, 56 insertions(+), 49 deletions(-)
diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c
index fba
Fixes checkpatch.pl alignment warnings.
Signed-off-by: Simon Sandström
---
drivers/staging/ccree/ssi_ivgen.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/staging/ccree/ssi_ivgen.c
b/drivers/staging/ccree/ssi_ivgen.c
index f140dbc5195c..86364f81acab 100644
--- a/
Fixes checkpatch.pl alignment warnings.
Signed-off-by: Simon Sandström
---
drivers/staging/ccree/ssi_buffer_mgr.c | 40 --
1 file changed, 24 insertions(+), 16 deletions(-)
diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c
b/drivers/staging/ccree/ssi_buffer_mg
Fixes checkpatch.pl alignment warnings.
Signed-off-by: Simon Sandström
---
drivers/staging/ccree/ssi_aead.c | 47 +---
1 file changed, 25 insertions(+), 22 deletions(-)
diff --git a/drivers/staging/ccree/ssi_aead.c b/drivers/staging/ccree/ssi_aead.c
index ea2
On 07/18/2017 11:06 AM, Sukadev Bhattiprolu wrote:
> Nicholas Piggin [nicholas.pig...@gmail.com] wrote:
>> On Mon, 17 Jul 2017 16:43:19 -0700
>> Haren Myneni wrote:
>>
>>> [PATCH V2 0/6] Enable NX 842 compression engine on Power9
>>> This patchset depends on VAS kernel changes:
>>> https://lists.o
Nicholas Piggin [nicholas.pig...@gmail.com] wrote:
> On Mon, 17 Jul 2017 16:43:19 -0700
> Haren Myneni wrote:
>
> > [PATCH V2 0/6] Enable NX 842 compression engine on Power9
> > This patchset depends on VAS kernel changes:
> > https://lists.ozlabs.org/pipermail/linuxppc-dev/2017-May/158178.html
>
From: Logan Gunthorpe
> Now that ioread64 and iowrite64 are available in io-64-nonatomic,
> we can remove the hack at the top of ntb_hw_intel.c and replace it
> with an include.
>
> Signed-off-by: Logan Gunthorpe
> Cc: Jon Mason
> Cc: Allen Hubbe
> Acked-by: Dave Jiang
Acked-by: Allen Hubbe
On 07/18/2017 01:28 AM, Stephan Müller wrote:
Am Montag, 17. Juli 2017, 22:08:27 CEST schrieb Gary R Hook:
Hi Gary,
Version 5 CCPs have differing requirements for XTS-AES: key components
are stored in a 512-bit vector. The context must be little-endian
justified. AES-256 is supported now, so p
From: Horia Geantă
We can now make use of the io-64-nonatomic-lo-hi header to always
provide 64 bit IO operations. So this patch cleans up the extra
CONFIG_64BIT ifdefs.
To be consistent with CAAM engine HW spec: in case of 64-bit registers,
irrespective of device endianness, the lower address s
This patch adds generic io{read|write}64[be]{_lo_hi|_hi_lo} macros if
they are not already defined by the architecture. (As they are provided
by the generic iomap library).
The patch also points io{read|write}64[be] to the variant specified by the
header name.
This is because new drivers are enco
In order to provide non-atomic functions for io{read|write}64 that will
use readq and writeq when appropriate. We define a number of variants
of these functions in the generic iomap that will do non-atomic
operations on pio but atomic operations on mmio.
These functions are only defined if readq a
Subsequent patches in this series makes use of the readq and writeq
defines in iomap.h. However, as is, they get missed on the powerpc
platform seeing the include comes before the define. This patch
moves the include down to fix this.
Signed-off-by: Logan Gunthorpe
Cc: Benjamin Herrenschmidt
Cc:
This is version four of my patchset to enable drivers to use
io{read|write}64 on all arches.
Changes since v3:
- I noticed powerpc didn't use the appropriate functions seeing
readq/writeq were not defined when iomap.h was included. Thus I've
included a patch to adjust this
- Fixed some mistakes w
Now that ioread64 and iowrite64 are available in io-64-nonatomic,
we can remove the hack at the top of ntb_hw_intel.c and replace it
with an include.
Signed-off-by: Logan Gunthorpe
Cc: Jon Mason
Cc: Allen Hubbe
Acked-by: Dave Jiang
---
drivers/ntb/hw/intel/ntb_hw_intel.c | 30 +---
aliases node is identical for all boards, thus move it
to the common file ls208xa.dtsi.
Signed-off-by: Horia Geantă
---
arch/arm64/boot/dts/freescale/fsl-ls2080a-qds.dts | 5 -
arch/arm64/boot/dts/freescale/fsl-ls2080a-rdb.dts | 5 -
arch/arm64/boot/dts/freescale/fsl-ls2080a-simu.dts |
LS208xA has a SEC v5.1 security engine.
Signed-off-by: Horia Geantă
---
arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 41 ++
1 file changed, 41 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
Add support for using the caam/jr backend on DPAA2-based SoCs.
These have some particularities we have to account for:
-HW S/G format is different
-Management Complex (MC) firmware initializes / manages (partially)
the CAAM block: MCFGR, QI enablement in QICTL, RNG
Signed-off-by: Horia Geantă
---
This patch set adds support for CAAM's legacy Job Ring backend / interface
on platforms having DPAA2 (Datapath Acceleration Architecture v2), like
LS1088A or LS2088A.
I would like to get the DT patches through the crypto list (to make sure
they don't end up merged before driver support).
Thanks,
LS1088A has a SEC v5.3 security engine.
Signed-off-by: Horia Geantă
---
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 43 ++
1 file changed, 43 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
Am Dienstag, 18. Juli 2017, 10:52:12 CEST schrieb Greg Kroah-Hartman:
Hi Greg,
>
> > I have stated the core concerns I have with random.c in [1]. To remedy
> > these core concerns, major changes to random.c are needed. With the past
> > experience, I would doubt that I get the changes into rando
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Washington DC been mandated to be deliver to your home address once
you reconfi
Hi, Herbert,
On 07/18/2017 08:52 AM, Herbert Xu wrote:
On Wed, Jun 28, 2017 at 05:08:36PM +0300, Tudor Ambarus wrote:
Using GFP_KERNEL when allocating data and implicitly
assuming that we can sleep was wrong because the caller
could be in atomic context. Let the caller decide whether
sleeping i
Hi,
On Mon, Jul 17, 2017 at 11:45:19AM +0200, Antoine Tenart wrote:
> The safexcel_hmac_sha1_setkey function checks if an invalidation command
> should be issued, i.e. when the context ipad/opad change. This checks is
> done after filling the ipad/opad which and it can't be true. The patch
> fixes
Hi, Herbert,
On 07/18/2017 08:50 AM, Herbert Xu wrote:
On Wed, Jun 28, 2017 at 05:08:35PM +0300, Tudor Ambarus wrote:
ecdh_ctx contained static allocated data for the shared secret,
for the public and private key.
When talking about shared secret and public key, they were
doomed to concurrency
On 18 July 2017 at 10:56, Ard Biesheuvel wrote:
> On 18 July 2017 at 10:49, Herbert Xu wrote:
>> On Wed, Jul 05, 2017 at 12:43:19AM +0100, Ard Biesheuvel wrote:
>>> Implement a NEON fallback for systems that do support NEON but have
>>> no support for the optional 64x64->128 polynomial multiplica
Remove the duplicated boilerplate help text and add a bit of
explanation about the nature of the various AES implementations that
exist for various architectures. In particular, highlight the time
variant nature of some implementations, and the fact that they can be
omitted if required.
Signed-off
For the final round, avoid the expanded and padded lookup tables
exported by the generic AES driver. Instead, for encryption, we can
perform byte loads from the same table we used for the inner rounds,
which will still be hot in the caches. For decryption, use the inverse
AES Sbox exported by the g
The newly introduced AES core module exposes its Sboxes for the benefit
of the fixed time AES driver. Since the arm64 NEON based implementation
already depends on the same core module for its key expansion routines,
let's use its Sboxes as well, and remove the local copy.
Signed-off-by: Ard Bieshe
The time invariant AES-NI implementation is SIMD based, and so it needs
a fallback in case the code is called from a context where SIMD is not
allowed. On x86, this is really only when executing in the context of an
interrupt taken while in kernel mode, since SIMD is allowed in all other
cases.
Th
Instead of linking against the table based AES generic C code to reuse
the lookup tables, add an assembler file that defines a couple of macros
that instantiate the tables in-place. This allows us to replace AES in
a subsequent patch.
Signed-off-by: Ard Biesheuvel
---
arch/arm/crypto/aes-cipher-
Rework the fixed time AES code so that it can fulfil dependencies of other
drivers on the shared AES key expansion routines. This way, we can remove
the table based generic AES code altogether, and use the much smaller and
time invariant fixed time driver as the global default for systems that
don'
For the final round, avoid the expanded and padded lookup tables
exported by the generic AES driver. Instead, for encryption, we can
perform byte loads from the same table we used for the inner rounds,
which will still be hot in the caches. For decryption, use the inverse
AES Sbox exported by the g
In preparation of fine tuning the dependency relations between the
accelerated AES drivers and the core support code, let's remove the
dependency declarations that are false. None of these modules have
link time dependencies on the generic AES code, nor do they declare
any AES algos with CRYPTO_ALG
The generic AES driver uses 16 lookup tables of 1 KB each, and has
encryption and decryption routines that are fully unrolled. Given how
the dependencies between this code and other drivers are declared in
Kconfig files, this code is always pulled into the core kernel, even
if it is usually superse
detach, otherwise it leads to a double
free.
(c) remove unnecessary blank lines.
Signed-off-by: Suniel Mahesh
---
Changes for v2:
- Changes done as suggested by Greg-KH.
- Rebased on top of next-20170718.
---
Note:
- Patch was tested and built(ARCH=arm) on next-20170718.
No build issues
region on driver detach.
(d) adjust log messages accordingly and remove any blank lines.
Signed-off-by: Suniel Mahesh
---
Changes for v2:
- format specifiers changed in log messages.
- Rebased on top of next-20170718.
---
Note:
- Patch was tested and built(ARCH=arm) on next-20170718.
No build
as it seems
redundant.
(e) free_irq is not required any more, devm_request_irq() free's it
on driver detach.
(f) adjust log messages accordingly and remove any blank lines.
Signed-off-by: Suniel Mahesh
---
Changes for v2:
- Rebased on top of next-20170718.
---
Note:
- Patch was tested and
On Tue, Jun 27, 2017 at 05:11:23PM +0530, Arvind Yadav wrote:
> of_device_ids are not supposed to change at runtime. All functions
> working with of_device_ids provided by work with const
> of_device_ids. So mark the non-const structs as const.
>
> File size before:
>text data bs
On Tue, Jun 27, 2017 at 08:58:04AM -0500, Gary R Hook wrote:
> Add/remove blank lines as appropriate.
>
> Signed-off-by: Gary R Hook
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
On Mon, Jun 26, 2017 at 08:41:03PM +0100, Colin King wrote:
> From: Colin Ian King
>
> trivial fix to spelling mistake in dev_info message
>
> Signed-off-by: Colin Ian King
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apa
On Tue, Jun 27, 2017 at 08:58:16AM -0500, Gary R Hook wrote:
> Use the CCP_NEW_JOBID() macro when assigning an identifier
>
> Signed-off-by: Gary R Hook
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pub
On Fri, Jun 30, 2017 at 12:59:52AM -0500, Gustavo A. R. Silva wrote:
> Print error message on platform_get_irq failure before return.
>
> Signed-off-by: Gustavo A. R. Silva
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana
On Tue, Jul 11, 2017 at 09:36:21AM +0200, Harald Freudenberger wrote:
> The hwrng core implementation currently doesn't consider the
> quality field of the struct hwrng. So the first registered rng
> is the winner and further rng sources even with much better
> quality are ignored.
>
> The behavio
On Tue, Jul 11, 2017 at 03:50:06PM +0530, Raveendra Padasalagi wrote:
> SPU driver is dependent on generic MAILBOX API's to
> communicate with underlying DMA engine driver.
>
> So this patch removes BCM_PDC_MBOX "depends on" for SPU driver
> in Kconfig and adds MAILBOX as dependent module.
>
> Fi
On Fri, Jun 30, 2017 at 01:24:54AM -0500, Gustavo A. R. Silva wrote:
> Propagate the return value of platform_get_irq on failure.
>
> Signed-off-by: Gustavo A. R. Silva
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org
On Fri, Jun 30, 2017 at 01:54:16AM -0500, Gustavo A. R. Silva wrote:
> Print error message on platform_get_irq failure before return.
>
> Signed-off-by: Gustavo A. R. Silva
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana
On Thu, Jul 06, 2017 at 02:44:56PM -0400, Chris Gorman wrote:
> fixed WARNING: Block comments should align the * on each line
> fixed WARNINGs: Missing a blank line after declarations
> fixed ERROR: space prohibited before that ',' (ctx:WxE)
>
> Signed-off-by: Chris Gorman
Patch applied. Thanks
On Fri, Jun 30, 2017 at 02:07:04AM -0500, Gustavo A. R. Silva wrote:
> Print and propagate the return value of platform_get_irq on failure.
>
> Signed-off-by: Gustavo A. R. Silva
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor
On Mon, Jul 10, 2017 at 08:40:26AM +0300, Horia Geantă wrote:
> [
> Change log:
> v1 -> v2
> -patch 05/13 - add missing check in ablkcipher_giv_edesc_alloc(),
> to make sure number of reserved S/G entries is not overflown
> -patch 12/13 - fix author - replace my Freescale address with
> correspondi
On Fri, Jun 30, 2017 at 02:00:54AM -0500, Gustavo A. R. Silva wrote:
> Propagate the return value of platform_get_irq on failure.
>
> Signed-off-by: Gustavo A. R. Silva
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org
On Fri, Jul 07, 2017 at 01:33:33AM -0500, Gustavo A. R. Silva wrote:
> Check return value from call to of_match_device()
> in order to prevent a NULL pointer dereference.
>
> In case of NULL print error message and return -ENODEV
>
> Signed-off-by: Gustavo A. R. Silva
Patch applied. Thanks.
--
On Wed, Jul 05, 2017 at 01:07:57PM +0300, Tudor Ambarus wrote:
> Hi,
>
> This patch set introduces Microchip / Atmel ECC driver.
>
> The first patch adds some helpers that will be used by fallbacks to
> kpp software implementations.
>
> The second patch adds ECDH support for the ATECC508A (I2C)
On Mon, Jul 03, 2017 at 08:48:48PM +0200, Corentin Labbe wrote:
> The Security System has a PRNG, this patch adds support for it via
> crypto_rng.
>
> Signed-off-by: Corentin Labbe
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gond
On Thu, Jul 06, 2017 at 09:59:12AM -0500, Brijesh Singh wrote:
> CCP device (drivers/crypto/ccp/ccp.ko) is part of AMD Secure Processor,
> which is not dedicated solely to crypto. The AMD Secure Processor includes
> CCP and PSP (Platform Secure Processor) devices.
>
> This patch series adds a fram
On Wed, Jun 28, 2017 at 11:56:47AM -0500, Gary R Hook wrote:
> Changes since v2:
> - On failure remove only the DebugFS heirarchy for this device
> Changes since v1:
> - Remove unneeded local variable
>
> Signed-off-by: Gary R Hook
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page: h
On Fri, Jun 30, 2017 at 01:42:12AM -0500, Gustavo A. R. Silva wrote:
> Print and propagate the return value of platform_get_irq on failure.
>
> Signed-off-by: Gustavo A. R. Silva
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor
On Fri, Jun 23, 2017 at 11:31:19AM -0400, Xin Zeng wrote:
> In current virtio crypto device driver, some common data structures and
> implementations that should be used by other virtio crypto algorithms
> (e.g. asymmetric crypto algorithms) introduce symmetric crypto algorithms
> specific implemen
On Fri, Jun 23, 2017 at 04:52:18PM +0200, Antoine Tenart wrote:
> The dma-mask property is broken and was removed in the device trees
> having a safexcel-eip197 node and in the safexcel cryptographic
> driver. This patch removes the dma-mask property from the documentation
> as well.
>
> Signed-of
On Fri, Jun 23, 2017 at 04:05:25PM +0200, Antoine Tenart wrote:
> Remove the dma mask parsing from dt as this should not be encoded into
> the engine device tree node. Keep the fallback value for now, which
> should work for the boards already supported upstream.
>
> Signed-off-by: Antoine Tenart
Raveendra Padasalagi wrote:
> In Broadcom SPU driver, due to missing break statement
> in spu2_hash_xlate() while mapping SPU2 equivalent
> SHA3-512 value, -EINVAL is chosen and hence leading to
> failure of SHA3-512 algorithm. This patch fixes the same.
>
> Fixes: 9d12ba86f818 ("crypto: brcm - A
Srikanth Jampala wrote:
> Moved the firmware to "cavium" subdirectory as suggested by
> Kyle McMartin.
>
> Signed-off-by: Srikanth Jampala
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
On 18 July 2017 at 10:49, Herbert Xu wrote:
> On Wed, Jul 05, 2017 at 12:43:19AM +0100, Ard Biesheuvel wrote:
>> Implement a NEON fallback for systems that do support NEON but have
>> no support for the optional 64x64->128 polynomial multiplication
>> instruction that is part of the ARMv8 Crypto E
On Wed, Jul 05, 2017 at 12:43:19AM +0100, Ard Biesheuvel wrote:
> Implement a NEON fallback for systems that do support NEON but have
> no support for the optional 64x64->128 polynomial multiplication
> instruction that is part of the ARMv8 Crypto Extensions. It is based
> on the paper "Fast Softwa
There are quite a number of occurrences in the kernel of the pattern
if (dst != src)
memcpy(dst, src, walk.total % AES_BLOCK_SIZE);
crypto_xor(dst, final, walk.total % AES_BLOCK_SIZE);
or
crypto_xor(keystream, src, nbytes);
memcpy(dst, keystream, nbytes);
where crypto_xor() is p
In preparation of introducing crypto_xor_cpy(), which will use separate
operands for input and output, modify the __crypto_xor() implementation,
which it will share with the existing crypto_xor(), which provides the
actual functionality when not using the inline version.
Signed-off-by: Ard Biesheu
>From 2/2:
"""
There are quite a number of occurrences in the kernel of the pattern
if (dst != src)
memcpy(dst, src, walk.total % AES_BLOCK_SIZE);
crypto_xor(dst, final, walk.total % AES_BLOCK_SIZE);
or
crypto_xor(keystream, src, nbytes);
memcpy(dst, keystream, nbyte
Am Dienstag, 18. Juli 2017, 11:16:10 CEST schrieb Arnd Bergmann:
Hi Arnd,
> I guess ideally you just move the inner half of lrng_get_jent(),
> i.e. everything inside of the spinlock, plus the buffer, into that file.
> That should keep the low-level side separate from the caller.
Yes, I concur.
On Tue, Jul 18, 2017 at 11:10 AM, Stephan Müller wrote:
> Am Dienstag, 18. Juli 2017, 11:02:02 CEST schrieb Arnd Bergmann:
>
> Hi Arnd,
>>
>> I can see why the jitterentropy implementation avoids using kernel headers,
>> the problem now is that part of it gets moved into a new header, and that
>>
Am Dienstag, 18. Juli 2017, 11:02:02 CEST schrieb Arnd Bergmann:
Hi Arnd,
>
> I can see why the jitterentropy implementation avoids using kernel headers,
> the problem now is that part of it gets moved into a new header, and that
> already violates the original principle.
>
> From my reading of
On Tue, Jul 18, 2017 at 10:49 AM, Greg Kroah-Hartman
wrote:
> On Tue, Jul 18, 2017 at 10:40:07AM +0200, Stephan Müller wrote:
>> Am Dienstag, 18. Juli 2017, 10:30:14 CEST schrieb Greg Kroah-Hartman:
>>
>> Hi Greg,
>>
>> > > +typedef unsigned long long __u64;
>> > > +typedef long long
Am Dienstag, 18. Juli 2017, 10:51:41 CEST schrieb Arnd Bergmann:
Hi Arnd,
> On Tue, Jul 18, 2017 at 9:59 AM, Stephan Müller wrote:
> > Add LRNG compilation support.
> >
> > diff --git a/drivers/char/Makefile b/drivers/char/Makefile
> > index 53e3372..87e06ec 100644
> > --- a/drivers/char/Makefi
Am Dienstag, 18. Juli 2017, 10:49:59 CEST schrieb Greg Kroah-Hartman:
Hi Greg,
>
> > This issue was discussed during the inclusion of the Jitter RNG C code
> > into
> > the kernel.
>
> Ok, that was then, this is now, why not change it now? How does
> including types.h change anything?
At the t
On Tue, Jul 18, 2017 at 10:45:12AM +0200, Stephan Müller wrote:
> Am Dienstag, 18. Juli 2017, 10:32:10 CEST schrieb Greg Kroah-Hartman:
>
> Hi Greg,
>
> > external references do not last as long as the kernel change log does :(
>
> What would be the best way to cite a 50+ page document? I got a
On Tue, Jul 18, 2017 at 10:45:12AM +0200, Stephan Müller wrote:
> Am Dienstag, 18. Juli 2017, 10:32:10 CEST schrieb Greg Kroah-Hartman:
>
> Hi Greg,
>
> > external references do not last as long as the kernel change log does :(
>
> What would be the best way to cite a 50+ page document? I got a
On Tue, Jul 18, 2017 at 9:59 AM, Stephan Müller wrote:
> Add LRNG compilation support.
>
> diff --git a/drivers/char/Makefile b/drivers/char/Makefile
> index 53e3372..87e06ec 100644
> --- a/drivers/char/Makefile
> +++ b/drivers/char/Makefile
> @@ -2,7 +2,15 @@
> # Makefile for the kernel characte
On 18 July 2017 at 09:39, Herbert Xu wrote:
> On Mon, Jul 10, 2017 at 02:45:48PM +0100, Ard Biesheuvel wrote:
>> There are quite a number of occurrences in the kernel of the pattern
>>
>> if (dst != src)
>> memcpy(dst, src, walk.total % AES_BLOCK_SIZE);
>> crypto_xor(dst, final
Am Dienstag, 18. Juli 2017, 10:47:00 CEST schrieb Arnd Bergmann:
Hi Arnd,
> On Tue, Jul 18, 2017 at 10:37 AM, Stephan Müller
wrote:
> > Am Dienstag, 18. Juli 2017, 10:13:55 CEST schrieb Arnd Bergmann:
> >> On Tue, Jul 18, 2017 at 9:58 AM, Stephan Müller
wrote:
> >> > When selecting the LRNG f
On Tue, Jul 18, 2017 at 10:40:07AM +0200, Stephan Müller wrote:
> Am Dienstag, 18. Juli 2017, 10:30:14 CEST schrieb Greg Kroah-Hartman:
>
> Hi Greg,
>
> > > +typedef unsigned long long __u64;
> > > +typedef long long __s64;
> >
> > types.h already has these defines, don't re
On Tue, Jul 18, 2017 at 10:37 AM, Stephan Müller wrote:
> Am Dienstag, 18. Juli 2017, 10:13:55 CEST schrieb Arnd Bergmann:
>> On Tue, Jul 18, 2017 at 9:58 AM, Stephan Müller wrote:
>> > When selecting the LRNG for compilation, disable add_disk_randomness and
>> > its supporting function.
>> >
>>
Am Dienstag, 18. Juli 2017, 10:32:10 CEST schrieb Greg Kroah-Hartman:
Hi Greg,
> external references do not last as long as the kernel change log does :(
What would be the best way to cite a 50+ page document? I got a suggestion to
include the ASCII version of the document into Documentation/ -
On Mon, Jul 10, 2017 at 02:45:48PM +0100, Ard Biesheuvel wrote:
> There are quite a number of occurrences in the kernel of the pattern
>
> if (dst != src)
> memcpy(dst, src, walk.total % AES_BLOCK_SIZE);
> crypto_xor(dst, final, walk.total % AES_BLOCK_SIZE);
>
> or
>
> cr
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