Geode LX AES/RNG driver triggers warning

Hi! I recently tested kernel v4.9 on my AMD Geode platform and noticed that its AES hardware driver triggers this warning on initialization: [1.265708] [ cut here ] [1.267932] WARNING: CPU: 0 PID: 1 at drivers/base/dd.c:344 driver_probe_device+0x5d/0x1ad [1.2

[PATCH] crypto: testmgr - use kmemdup instead of kmalloc+memcpy

From: Eric Biggers It's recommended to use kmemdup instead of kmalloc followed by memcpy. Signed-off-by: Eric Biggers --- crypto/testmgr.c | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/crypto/testmgr.c b/crypto/testmgr.c index 44e888b0b041..881176ebd8a8 100644 --- a

Re: orinoco: Use shash instead of ahash for MIC calculations

Kalle Valo writes: > Kalle Valo writes: > >> Andrew Lutomirski wrote: >>> Eric Biggers pointed out that the orinoco driver pointed scatterlists >>> at the stack. >>> >>> Fix it by switching from ahash to shash. The result should be >>> simpler, faster, and more correct. >>> >>> Cc: sta...@vg

Re: [RFC PATCH] crypto: skcipher - introduce walksize attribute for SIMD algos

On Thu, Dec 29, 2016 at 02:09:08PM +, Ard Biesheuvel wrote: > In some cases, SIMD algorithms can only perform optimally when > allowed to operate on multiple input blocks in parallel. This is > especially true for bit slicing algorithms, which typically take > the same amount of time processing

Re: [PATCH] virtio-crypto: support crypto engine framework

On Tue, Dec 27, 2016 at 02:49:07PM +0800, Gonglei wrote: > crypto engine was introduced since 'commit 735d37b5424b ("crypto: engine > - Introduce the block request crypto engine framework")' which uses work > queue to realize the asynchronous processing for ablk_cipher and ahash. > > For virtio-cr

Re: [PATCH] crypto: qat - increase number of supported devices

On Thu, Dec 22, 2016 at 03:01:02PM +, Giovanni Cabiddu wrote: > From: Xin Zeng > > The unsigned long type for init_status and start_status in > service_hndl are not long enough to represent more than 64 > acceleration devices. Use an array instead. > > Signed-off-by: Xin Zeng > Signed-off-b

Re: [PATCH] crypto: qat - zero esram only for DH85x devices

On Thu, Dec 22, 2016 at 03:00:24PM +, Giovanni Cabiddu wrote: > Zero embedded ram in DH85x devices. This is not > needed for newer generations as it is done by HW. > > Signed-off-by: Giovanni Cabiddu Patch applied. Thanks. -- Email: Herbert Xu Home Page: http://gondor.apana.org.au/~herber

Re: [PATCH] crypto: qat - modify format of dev top level debugfs entries

On Thu, Dec 22, 2016 at 03:00:34PM +, Giovanni Cabiddu wrote: > From: Pablo Marcos Oltra > > Remove leading zeros in pci function number to be consistent > with output from lspci. > > Signed-off-by: Pablo Marcos Oltra > Signed-off-by: Giovanni Cabiddu Patch applied. Thanks. -- Email: He

Re: [PATCH] crypto: qat - fix bar discovery for c62x

On Thu, Dec 22, 2016 at 03:00:12PM +, Giovanni Cabiddu wrote: > Some accelerators of the c62x series have only two bars. > This patch skips BAR0 if the accelerator does not have it. > > Signed-off-by: Giovanni Cabiddu Patch applied. Thanks. -- Email: Herbert Xu Home Page: http://gondor.ap

Re: [PATCH] crypto: qat - fix indentation

On Thu, Dec 22, 2016 at 02:58:23PM +, Giovanni Cabiddu wrote: > From: Ahsan Atta > > Signed-off-by: Ahsan Atta > Signed-off-by: Giovanni Cabiddu Patch applied. Thanks. -- Email: Herbert Xu Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubke

Re: [PATCH] crypto: qat - replace hardcoded BIT(0) in vf_isr

On Thu, Dec 22, 2016 at 02:59:40PM +, Giovanni Cabiddu wrote: > Replace BIT(0) macro with proper definition in pf2vf path > > Signed-off-by: Giovanni Cabiddu Patch applied. Thanks. -- Email: Herbert Xu Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~he

Re: [PATCH] crypto: qat - fix comments describing adf_disable_sriov()

On Thu, Dec 22, 2016 at 02:59:24PM +, Giovanni Cabiddu wrote: > From: Ahsan Atta > > Signed-off-by: Ahsan Atta > Signed-off-by: Giovanni Cabiddu Patch applied. Thanks. -- Email: Herbert Xu Home Page: http://gondor.apana.org.au/~herbert/ PGP Key: http://gondor.apana.org.au/~herbert/pubke

Re: orinoco: Use shash instead of ahash for MIC calculations

Kalle Valo writes: > Andrew Lutomirski wrote: >> Eric Biggers pointed out that the orinoco driver pointed scatterlists >> at the stack. >> >> Fix it by switching from ahash to shash. The result should be >> simpler, faster, and more correct. >> >> Cc: sta...@vger.kernel.org # 4.9 only >> Repo

Re: orinoco: Use shash instead of ahash for MIC calculations

Andrew Lutomirski wrote: > Eric Biggers pointed out that the orinoco driver pointed scatterlists > at the stack. > > Fix it by switching from ahash to shash. The result should be > simpler, faster, and more correct. > > Cc: sta...@vger.kernel.org # 4.9 only > Reported-by: Eric Biggers > Signed

Re: simd ciphers

Am Donnerstag, 29. Dezember 2016, 17:44:15 CET schrieb Herbert Xu: Hi Herbert, > On Wed, Dec 28, 2016 at 12:21:52PM +0100, Stephan Müller wrote: > > This patch does not help. But I now found the issue: we need some Kconfig > > wizardry to mandate pcbc to be compiled statically when AES-NI is stat

Re: [RFC PATCH v2] crypto: Add IV generation algorithms

On Thu, Dec 29, 2016 at 02:53:25PM +0530, Binoy Jayan wrote: > > When we keep these in dm-crypt and if more than one key is used > (it is actually more than one parts of the original key), > there are more than one cipher instance created - one for each > unique part of the key. Since the crypto re

Crypto Fixes for 4.10

Hi Linus: This push fixes a boot failure on some platforms when crypto self test is enabled along with the new acomp interface. Please pull from git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6.git linus Laura Abbott (1): crypto: testmgr - Use heap buffer for acomp test