> I have just some minor comments below
Appreciate your review.
>> diff --git a/drivers/char/hw_random/jz4780-rng.c
>> b/drivers/char/hw_random/jz4780-rng.c
>> new file mode 100644
>> index 000..c9d2cde
>> --- /dev/null
>> +++ b/drivers/char/hw_random/jz4780-rng.c
>> @@ -0,0 +1,105 @@
>> +/*
Update the documentation for crypto_register_algs() and
crypto_unregister_algs() to match the actual behavior.
Signed-off-by: Eric Biggers
---
Documentation/DocBook/crypto-API.tmpl | 38 ---
1 file changed, 26 insertions(+), 12 deletions(-)
diff --git a/Documenta
Hi!
> As far as whether or not you can gather enough entropy at boot time,
> what we're really talking about how how much entropy we want to assume
> can be gathered from interrupt timings, since what you do in your code
> is not all that different from what the current random driver is
> doing.
Hello
I have just some minor comments below
> diff --git a/drivers/char/hw_random/jz4780-rng.c
> b/drivers/char/hw_random/jz4780-rng.c
> new file mode 100644
> index 000..c9d2cde
> --- /dev/null
> +++ b/drivers/char/hw_random/jz4780-rng.c
> @@ -0,0 +1,105 @@
> +/*
> + * jz4780-rng.c - Random
On 17 August 2016 at 21:31, Daniel Thompson wrote:
> On 17/08/16 16:35, PrasannaKumar Muralidharan wrote:
>>
>> This patch adds support for hardware random number generator present in
>> JZ4780 SoC.
>>
>> Signed-off-by: PrasannaKumar Muralidharan
>> ---
>> .../devicetree/bindings/rng/ingenic,jz4
On 17/08/16 16:35, PrasannaKumar Muralidharan wrote:
This patch adds support for hardware random number generator present in
JZ4780 SoC.
Signed-off-by: PrasannaKumar Muralidharan
---
.../devicetree/bindings/rng/ingenic,jz4780-rng.txt | 12 +++
MAINTAINERS
This patch adds support for hardware random number generator present in
JZ4780 SoC.
Signed-off-by: PrasannaKumar Muralidharan
---
.../devicetree/bindings/rng/ingenic,jz4780-rng.txt | 12 +++
MAINTAINERS| 5 +
arch/mips/boot/dts/ingenic/jz4780.dtsi
Hi Stephan,
On 8/17/16, 9:57 AM, "Stephan Mueller" wrote:
>Am Mittwoch, 17. August 2016, 14:52:32 CEST schrieb Tapas Sarangi:
>
>Hi Tapas,
>
>(please, do not top-post)
DNT, Sorry.
>
>> Hi Stephan,
>>
>> Yes, can you give me some more detail about your findings on dracut-fips
>> !? This seems
Am Mittwoch, 17. August 2016, 14:52:32 CEST schrieb Tapas Sarangi:
Hi Tapas,
(please, do not top-post)
> Hi Stephan,
>
> Yes, can you give me some more detail about your findings on dracut-fips
> !? This seems to be the major difference between our test environments
> where a bunch of algorithm
Hi Stephan,
Yes, can you give me some more detail about your findings on dracut-fips
!? This seems to be the major difference between our test environments
where a bunch of algorithms are failing self-test during boot with fips=1.
Thanks
-Tapas
On 8/16/16, 4:38 AM, "Stephan Mueller" wrote:
>H
Adds the config entry for the Chelsio Crypto Driver, Makefile changes
for the same.
Signed-off-by: Atul Gupta
Signed-off-by: Hariprasad Shenai
---
drivers/crypto/Kconfig |2 ++
drivers/crypto/Makefile |1 +
drivers/crypto/chelsio/Kconfig | 19 +++
dri
The Chelsio's Crypto Hardware can perform the following operations:
SHA1, SHA224, SHA256, SHA384 and SHA512, HMAC(SHA1), HMAC(SHA224),
HMAC(SHA256), HMAC(SHA384), HAMC(SHA512), AES-128-CBC, AES-192-CBC,
AES-256-CBC, AES-128-XTS, AES-256-XTS
This patch implements the driver for above mentioned feat
Hi All,
This patch series adds support for Chelsio Crypto driver.
The patch series has been created against net-next tree and includes
patches for Chelsio Low Level Driver(cxgb4) and adds the new crypto
Upper Layer Driver(chcr) under a new directory drivers/crypto/chelsio.
Patch 1/4 ("cxgb4: Ad
Signed-off-by: Atul Gupta
Signed-off-by: Hariprasad Shenai
---
drivers/net/ethernet/chelsio/cxgb4/t4_msg.h | 437 +
drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h | 124 +++
2 files changed, 561 insertions(+), 0 deletions(-)
diff --git a/drivers/net/ethernet/chels
Add a new commmon infrastructure to allocate reosurces dynamically to
Upper layer driver's(ULD) when they register with cxgb4 driver and free
them during unregistering. All the queues and the interrupts for
them will be allocated during ULD probe only and freed during remove.
Signed-off-by: Atul G
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