Am Donnerstag, 2. Juli 2015, 15:41:19 schrieb Nishanth Aravamudan:
Hi Nishanth,
>Currently, when the nx-842-pseries driver loads, the following message
>is emitted:
>
>alg: No test for 842 (842-nx)
>
>It seems like the simplest way to fix this message (other than adding a
>proper test) is to just
On Thu, 2015-07-02 at 15:40 -0700, Nishanth Aravamudan wrote:
> While we never would successfully load on the wrong machine type, there
> is extra output by default regardless of machine type.
>
> For instance, on a PowerVM LPAR, we see the following:
>
> nx_compress_powernv: loading
> nx_compres
Based off the CONFIG_SPU_FS_MODULE code, only attempt to load platform
modules if the nx-842 pseries/powernv drivers are built as modules.
Otherwise, if CONFIG_DEV_NX_COMPRESS=y,
CONFIG_DEV_NX_COMPRESS_PSERIES=y, CONFIG_DEV_NX_POWERNV=y, the following
message is emitted at boot:
nx_compress: no n
Currently, when the nx-842-pseries driver loads, the following message
is emitted:
alg: No test for 842 (842-nx)
It seems like the simplest way to fix this message (other than adding a
proper test) is to just insert the null test into the list in the
testmgr.
Signed-off-by: Nishanth Aravamudan
While we never would successfully load on the wrong machine type, there
is extra output by default regardless of machine type.
For instance, on a PowerVM LPAR, we see the following:
nx_compress_powernv: loading
nx_compress_powernv: no coprocessors found
even though those coprocessors could never
If the device-tree indicates the nx-842 device's status is 'disabled',
we emit two messages:
nx_compress_pseries ibm,compression-v1: nx842_OF_upd_status: status 'disabled'
is not 'okay'.
nx_compress_pseries ibm,compression-v1: nx842_OF_upd: device disabled
Given that 'disabled' is a valid state,
While there is no technical reason that both nx-842.c and
nx-842-pseries.c can have the same name for the init/exit functions, it
is a bit confusing with initcall_debug. Rename the pseries specific
functions appropriately
Signed-off-by: Nishanth Aravamudan
---
drivers/crypto/nx/nx-842-pseries.c
The current documention mentions explicitly that EINVAL should be
returned if the device is not available, but nx842_OF_upd_status()
always returns 0. However, nx842_probe() specifically checks for
non-ENODEV returns from nx842_of_upd() (which in turn calls
nx842_OF_upd_status()) and emits an extra
Currently, on a LPAR with the nx-842 device disabled, the following
messages are emitted:
nx_compress: no nx842 driver found. [1]
Registering IBM Power 842 compression driver
nx_compress_pseries ibm,compression-v1: nx842_OF_upd_status: status 'disabled'
is not 'okay'
nx_compress_pseries ibm,compr
I was trying to follow the example for IPsec transport mode at
http://www.ipsec-howto.org/x304.html with a 4.1 kernel,
and I find that using 3des_cbc does not work - packets get dropped
at the receiver after decryption: e.g., for a ping, the decrypted
packet has a mangled icmp header, and is dro
dma_unmap_sg() is being called twice after completing the
task. Looks like this is a copy paste error when creating
des driver.
With this the following warn appears during boot:
[4.210457] [ cut here ]
[4.215114] WARNING: CPU: 0 PID: 0 at lib/dma-debug.c:1080
check
On Thursday 02 July 2015 01:36 PM, Felipe Balbi wrote:
> On Thu, Jul 02, 2015 at 10:48:39AM +0530, Lokesh Vutla wrote:
>> Add support for PIO mode for GCM mode.
>>
>> Signed-off-by: Lokesh Vutla
>
> why do you require PIO ? Is there any situation where DMA can't be
> used? What would that case be
On Thursday 02 July 2015 01:34 PM, Felipe Balbi wrote:
> On Thu, Jul 02, 2015 at 10:48:36AM +0530, Lokesh Vutla wrote:
>> Its not necessary that assoc data and plain text is passed always.
>> Add these checks before processing the input.
>>
>> Signed-off-by: Lokesh Vutla
>
> why can't this be com
On Thursday 02 July 2015 01:34 PM, Felipe Balbi wrote:
> On Thu, Jul 02, 2015 at 10:48:35AM +0530, Lokesh Vutla wrote:
>> OMAP AES hw supports aes gcm mode.
>
> here you refer to it as 'gcm'
Will update it in next revision.
>
>> Adding support for GCM mode in omap-aes driver.
>
> while here and
Am Donnerstag, 2. Juli 2015, 15:24:58 schrieb Lokesh Vutla:
Hi Lokesh,
>>> +{
>>> + .cra_name = "gcm(aes)",
>>> + .cra_driver_name= "gcm-aes-omap",
>>> + .cra_priority = 100,
>>
>> Why did you choose the priority 100? The software implementations commonly
>>
On Thursday 02 July 2015 01:30 PM, Stephan Mueller wrote:
> Am Donnerstag, 2. Juli 2015, 10:48:38 schrieb Lokesh Vutla:
>
> Hi Lokesh,
>
>> Now the driver supports gcm mode, add omap-aes-gcm
>> algo info to omap-aes driver.
>>
>> Signed-off-by: Lokesh Vutla
>> ---
>> drivers/crypto/omap-aes.c |
On Thursday 02 July 2015 01:28 PM, Felipe Balbi wrote:
> On Thu, Jul 02, 2015 at 10:48:33AM +0530, Lokesh Vutla wrote:
>> Add aead_request_cast() api to get pointer to aead_request
>> from cryto_async_request.
>>
>> Signed-off-by: Lokesh Vutla
>> ---
>> include/linux/crypto.h |6 ++
>> 1
On Thursday 02 July 2015 01:27 PM, Felipe Balbi wrote:
> On Thu, Jul 02, 2015 at 10:48:32AM +0530, Lokesh Vutla wrote:
>> AES_CTRL_REG is used to configure AES mode. Before configuring
>> any mode we need to make sure all other modes are reset or else
>> driver will misbehave. So mask all modes bef
On Thursday 02 July 2015 01:23 PM, Felipe Balbi wrote:
> On Thu, Jul 02, 2015 at 10:48:31AM +0530, Lokesh Vutla wrote:
>> OMAP AES driver returns an error if the data is not aligned with
>> AES_BLOCK_SIZE bytes.
>> But OMAP AES hw allows data input upto 1 byte aligned, but still
>> zeros are to be
On Thu, Jul 02, 2015 at 10:48:39AM +0530, Lokesh Vutla wrote:
> Add support for PIO mode for GCM mode.
>
> Signed-off-by: Lokesh Vutla
why do you require PIO ? Is there any situation where DMA can't be
used? What would that case be ?
--
balbi
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Description: Digital signature
On Thu, Jul 02, 2015 at 10:48:37AM +0530, Lokesh Vutla wrote:
> Check if the inputs are not aligned, if not process
> the input before starting the hw acceleration.
> Similarly after completition of hw acceleration.
>
> Signed-off-by: Lokesh Vutla
and this ?
--
balbi
signature.asc
Descriptio
On Thu, Jul 02, 2015 at 10:48:36AM +0530, Lokesh Vutla wrote:
> Its not necessary that assoc data and plain text is passed always.
> Add these checks before processing the input.
>
> Signed-off-by: Lokesh Vutla
why can't this be combined with patch which added GCM in the first
place ?
> ---
>
On Thu, Jul 02, 2015 at 10:48:35AM +0530, Lokesh Vutla wrote:
> OMAP AES hw supports aes gcm mode.
here you refer to it as 'gcm'
> Adding support for GCM mode in omap-aes driver.
while here and in subject as 'GCM'.
> Signed-off-by: Lokesh Vutla
> ---
> drivers/crypto/Makefile |3 +-
Am Donnerstag, 2. Juli 2015, 10:48:38 schrieb Lokesh Vutla:
Hi Lokesh,
>Now the driver supports gcm mode, add omap-aes-gcm
>algo info to omap-aes driver.
>
>Signed-off-by: Lokesh Vutla
>---
> drivers/crypto/omap-aes.c | 22 ++
> 1 file changed, 22 insertions(+)
>
>diff --git
On Thu, Jul 02, 2015 at 10:48:34AM +0530, Lokesh Vutla wrote:
> Use BIT()/GENMASK() macros for all register definitions instead of
> hand-writing bit masks.
>
> Signed-off-by: Lokesh Vutla
> ---
> drivers/crypto/omap-aes.c | 36 ++--
> 1 file changed, 18 inserti
On Thu, Jul 02, 2015 at 10:48:33AM +0530, Lokesh Vutla wrote:
> Add aead_request_cast() api to get pointer to aead_request
> from cryto_async_request.
>
> Signed-off-by: Lokesh Vutla
> ---
> include/linux/crypto.h |6 ++
> 1 file changed, 6 insertions(+)
>
> diff --git a/include/linux/c
On Thu, Jul 02, 2015 at 10:48:32AM +0530, Lokesh Vutla wrote:
> AES_CTRL_REG is used to configure AES mode. Before configuring
> any mode we need to make sure all other modes are reset or else
> driver will misbehave. So mask all modes before configuring
> any AES mode.
>
> Signed-off-by: Lokesh V
On Thu, Jul 02, 2015 at 10:48:31AM +0530, Lokesh Vutla wrote:
> OMAP AES driver returns an error if the data is not aligned with
> AES_BLOCK_SIZE bytes.
> But OMAP AES hw allows data input upto 1 byte aligned, but still
> zeros are to be appended and complete AES_BLOCK_SIZE has to be written.
> And
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