Hi Stephen,
Thanks a million for the information provided. I really appreciate
your time and efforts.
In CTR mode counter size is not fixed , it varies based on
requirements like for rfc 3686 its size is 4 bytes, for other "CTR
Mode" operations it is 8/16 bytes. So how does linux crypto HW driver
Hey Boris,
On Fri, Apr 10, 2015 at 05:11:48PM +0200, Boris Brezillon wrote:
> On Fri, 10 Apr 2015 13:50:56 + Jason Cooper wrote:
> > On Thu, Apr 09, 2015 at 04:58:41PM +0200, Boris Brezillon wrote:
> > > I know we usually try to adapt existing drivers instead of replacing them
> > > by new on
Am Samstag, 11. April 2015, 00:30:30 schrieb sri sowj:
Hi sri,
> Hi All,
>
> I have seen multiple open source drivers for AES(CTR) mode for
> different Crypto Hardware Engines, I was not really sure on
> countersize,nonce etc.
> Please can any one provide some info on the following
>
> #1:How d
> On 10 apr. 2015, at 22:08, Arnd Bergmann wrote:
>
>> On Friday 10 April 2015 16:29:08 Ard Biesheuvel wrote:
>> +#if __ARM_MAX_ARCH__>=7
>> +.arch armv7-a
>> +.fpu neon
>> +
>
> This will cause a build failure on an ARMv7-M build, which is incompatible
> with .arch armv7-a and .fpu neon.
On Fri, Apr 10, 2015 at 04:33:17PM +0200, Stephan Mueller wrote:
> Am Freitag, 10. April 2015, 14:22:08 schrieb mancha security:
>
> Hi mancha,
>
> >__asm__ __volatile__("": :"r"(p) :"memory")
>
> gcc -O2/3: mov present
>
> clang -O2/3: mov present
>
> ==> approach would be good too.
>
> Note
On Friday 10 April 2015 16:29:08 Ard Biesheuvel wrote:
> +#if __ARM_MAX_ARCH__>=7
> +.arch armv7-a
> +.fpu neon
> +
>
This will cause a build failure on an ARMv7-M build, which is incompatible
with .arch armv7-a and .fpu neon.
Arnd
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to do, we also add a #warning
state in place of the removed to that tells users which version to use.
Signed-off-by: Arnd Bergmann
Link: http://storage.kernelci.org/next/next-20150410/arm-allmodconfig/build.log
Fixes: 864cbeed4ab22d ("crypto: arm - add support for SHA1 using ARMv8 Crypto
Ins
