Oops, a typo in the subject line. Should be
[PATCH v2 0/5] crypto: SHA1 multibuffer implementation
as there are now only 5 patches in the series.
Tim
--
To unsubscribe from this list: send the line "unsubscribe linux-crypto" in
the body of a message to majord...@vger.kernel.org
More majordomo
This patch introduces the assembly routines to do SHA1 computation on
buffers belonging to serveral jobs at once. The assembly routines are
optimized with AVX2 instructions that have 8 data lanes and using AVX2
registers.
Signed-off-by: Tim Chen
---
arch/x86/crypto/sha-mb/sha1_x8_avx2.S | 472 +
This patch introduces the data structures and prototypes of functions
needed for computing SHA1 hash using multi-buffer. Included are the
structures of the multi-buffer SHA1 job, job scheduler in C and x86
assembly.
Signed-off-by: Tim Chen
---
arch/x86/crypto/sha-mb/sha1_mb_mgr_datastruct.S | 2
Herbert,
I've updated the code to use the new cyrpto_ahah_walk interfaces.
I'll greatly appreciate more reviews from you and the community for other
parts of this code.
In this patch series, we introduce the multi-buffer crypto algorithm on
x86_64 and apply it to SHA1 hash computation. The multi
This patch introduces the multi-buffer scheduler which is responsible
for submitting scatter-gather buffers from several SHA1 jobs to the
multi-buffer algorithm. It also contains the flush routine to that's
called by the crypto daemon to complete the job when no new jobs arrive
before the deadline
This patch introduces the multi-buffer crypto daemon which is responsible
for submitting crypto jobs in a work queue to the responsible multi-buffer
crypto algorithm. The idea of the multi-buffer algorihtm is to put
data streams from multiple jobs in a wide (AVX2) register and then
take advantage
This patch introduces the routines used to submit and flush buffers
belonging to SHA1 crypto jobs to the SHA1 multibuffer algorithm. It is
implemented mostly in assembly optimized with AVX2 instructions.
Signed-off-by: Tim Chen
---
arch/x86/crypto/sha-mb/sha1_mb_mgr_flush_avx2.S | 327
Stephan Mueller wrote:
> Hi,
>
> the following set of patches implements the deterministic random bit generator
> (DRBG) specified by SP800-90A.
>
> The DRBG implementation offers the following:
>
>* All three DRBG types are implemented with a derivation function.
>* All DRBG ty
Stephan Mueller wrote:
>
> + memset(&drbg_algs[i], 0, sizeof(struct crypto_alg));
> + if (pr) {
> + memcpy(drbg_algs[i].cra_name, "drbg(pr(", 8);
> + memcpy(drbg_algs[i].cra_driver_name, "drbg_pr_", 8);
> + pos = 8;
You shouldn't use the brack
On Thursday 22 May 2014, Corentin LABBE wrote:
> Le 22/05/2014 17:28, Arnd Bergmann a écrit :
> > On Thursday 22 May 2014 17:09:56 LABBE Corentin wrote:
> >> Signed-off-by: LABBE Corentin
> >
> > My feeling is that this should either be one driver that provides
> > all five algorithms uncondition
10 matches
Mail list logo