Re: Fwd: [crypto:master 60/60] arch/x86/crypto/ghash-clmulni-intel_glue.c:71:25: sparse: cast to restricted __be64

2014-05-06 Thread Ard Biesheuvel
On 7 May 2014 00:42, gre...@linuxfoundation.org wrote: > On Fri, Apr 11, 2014 at 09:48:42PM +0200, Ard Biesheuvel wrote: >> On 11 April 2014 18:03, gre...@linuxfoundation.org >> wrote: >> > On Fri, Apr 04, 2014 at 10:11:19AM +0200, Ard Biesheuvel wrote: >> >> Greg, >> >> >> >> This pertains to co

ahash vs. shash

2014-05-06 Thread Dmitry Kasatkin
Hi, ahash allows to use HW acceleration, but usually it comes at a cost of additional HW related configuration overhead, such as configuring hash module, DMA, etc. For that reason hashing small chucks of data is faster doing it with shash (CPU) rather than HW acceleration. I measured long time ag

RE: [PATCH] crypto:caam - Modify width of few read only registers

2014-05-06 Thread Ruchika Gupta
Hi Kim, > -Original Message- > From: Kim Phillips [mailto:kim.phill...@freescale.com] > Sent: Wednesday, May 07, 2014 2:02 AM > To: Gupta Ruchika-R66431 > Cc: linux-crypto@vger.kernel.org; herb...@gondor.apana.org.au > Subject: Re: [PATCH] crypto:caam - Modify width of few read only regist

Re: Fwd: [crypto:master 60/60] arch/x86/crypto/ghash-clmulni-intel_glue.c:71:25: sparse: cast to restricted __be64

2014-05-06 Thread gre...@linuxfoundation.org
On Fri, Apr 11, 2014 at 09:48:42PM +0200, Ard Biesheuvel wrote: > On 11 April 2014 18:03, gre...@linuxfoundation.org > wrote: > > On Fri, Apr 04, 2014 at 10:11:19AM +0200, Ard Biesheuvel wrote: > >> Greg, > >> > >> This pertains to commit 8ceee72808d1 (crypto: ghash-clmulni-intel - > >> use C impl

Re: [PATCH] crypto: x86/sha1: fix coverity CID 1195603

2014-05-06 Thread Pavel Machek
Hi! > Most likely yes but I wanted to keep sha1_ssse3_mod_init consistent > with sha256_ssse3_mod_init/sha512_ssse3_mod_init functions. > > > Reported-by: > > > Signed-off-by: Milos Vyletel > > > --- > > > arch/x86/crypto/sha1_ssse3_glue.c | 22 -- > > > 1 file changed, 12

Re: [PATCH] crypto:caam - Modify width of few read only registers

2014-05-06 Thread Kim Phillips
On Tue, 6 May 2014 05:11:23 -0500 Gupta Ruchika-R66431 wrote: > > From: Kim Phillips [mailto:kim.phill...@freescale.com] > > Sent: Friday, May 02, 2014 2:15 AM > > > > On Tue, 29 Apr 2014 15:34:37 +0530 > > Ruchika Gupta wrote: > > > > > Few read only registers like CHAVID, CTPR etc were wrong

Re: [PATCH] crypto: caam - Fix key inlining in AEAD shared descriptors

2014-05-06 Thread Kim Phillips
On Mon, 5 May 2014 22:39:09 -0500 Garg Vakul-B16394 wrote: > Hi Kim Hi Vakul, > > From: Kim Phillips [mailto:kim.phill...@freescale.com] > > Sent: Tuesday, May 06, 2014 12:07 AM > > > > On Sat, 3 May 2014 06:44:39 -0500 > > Garg Vakul-B16394 wrote: > > > > > > From: Kim Phillips [mailto:kim.

Re: [PATCH resend 04/15] arm64: add support for kernel mode NEON in interrupt context

2014-05-06 Thread Ard Biesheuvel
On 6 May 2014 18:49, Catalin Marinas wrote: > On Thu, May 01, 2014 at 04:49:36PM +0100, Ard Biesheuvel wrote: >> diff --git a/arch/arm64/include/asm/fpsimd.h >> b/arch/arm64/include/asm/fpsimd.h >> index 7a900142dbc8..05e1b24aca4c 100644 >> --- a/arch/arm64/include/asm/fpsimd.h >> +++ b/arch/arm6

Re: [PATCH resend 04/15] arm64: add support for kernel mode NEON in interrupt context

2014-05-06 Thread Catalin Marinas
On Thu, May 01, 2014 at 04:49:36PM +0100, Ard Biesheuvel wrote: > diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h > index 7a900142dbc8..05e1b24aca4c 100644 > --- a/arch/arm64/include/asm/fpsimd.h > +++ b/arch/arm64/include/asm/fpsimd.h > @@ -41,6 +41,17 @@ struct fpsi

Re: [PATCH resend 03/15] arm64: defer reloading a task's FPSIMD state to userland resume

2014-05-06 Thread Catalin Marinas
On Tue, May 06, 2014 at 05:25:14PM +0100, Ard Biesheuvel wrote: > On 6 May 2014 18:08, Catalin Marinas wrote: > > On Thu, May 01, 2014 at 04:49:35PM +0100, Ard Biesheuvel wrote: > >> @@ -153,12 +252,11 @@ static int fpsimd_cpu_pm_notifier(struct > >> notifier_block *self, > >> { > >> swi

Re: [PATCH resend 03/15] arm64: defer reloading a task's FPSIMD state to userland resume

2014-05-06 Thread Ard Biesheuvel
On 6 May 2014 18:08, Catalin Marinas wrote: > On Thu, May 01, 2014 at 04:49:35PM +0100, Ard Biesheuvel wrote: >> @@ -153,12 +252,11 @@ static int fpsimd_cpu_pm_notifier(struct >> notifier_block *self, >> { >> switch (cmd) { >> case CPU_PM_ENTER: >> - if (current->mm

Re: [PATCH resend 03/15] arm64: defer reloading a task's FPSIMD state to userland resume

2014-05-06 Thread Catalin Marinas
On Thu, May 01, 2014 at 04:49:35PM +0100, Ard Biesheuvel wrote: > @@ -153,12 +252,11 @@ static int fpsimd_cpu_pm_notifier(struct notifier_block > *self, > { > switch (cmd) { > case CPU_PM_ENTER: > - if (current->mm) > + if (current->mm && !test_thread_f

Re: [PATCH resend 02/15] arm64: add abstractions for FPSIMD state manipulation

2014-05-06 Thread Catalin Marinas
On Tue, May 06, 2014 at 04:12:55PM +0100, Catalin Marinas wrote: > On Tue, May 06, 2014 at 03:48:08PM +0100, Ard Biesheuvel wrote: > > On 6 May 2014 16:43, Catalin Marinas wrote: > > > On Thu, May 01, 2014 at 04:49:34PM +0100, Ard Biesheuvel wrote: > > >> diff --git a/arch/arm64/kernel/fpsimd.c b/

Re: [PATCH resend 01/15] asm-generic: allow generic unaligned access if the arch supports it

2014-05-06 Thread Catalin Marinas
On Tue, May 06, 2014 at 03:34:23PM +0100, Ard Biesheuvel wrote: > On 6 May 2014 16:31, Catalin Marinas wrote: > > On Thu, May 01, 2014 at 04:49:33PM +0100, Ard Biesheuvel wrote: > >> Switch the default unaligned access method to 'hardware implemented' > >> if HAVE_EFFICIENT_UNALIGNED_ACCESS is set

Re: [PATCH resend 02/15] arm64: add abstractions for FPSIMD state manipulation

2014-05-06 Thread Catalin Marinas
On Tue, May 06, 2014 at 03:48:08PM +0100, Ard Biesheuvel wrote: > On 6 May 2014 16:43, Catalin Marinas wrote: > > On Thu, May 01, 2014 at 04:49:34PM +0100, Ard Biesheuvel wrote: > >> diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c > >> index 4aef42a04bdc..86ac6a9bc86a 100644 >

Re: [PATCH resend 02/15] arm64: add abstractions for FPSIMD state manipulation

2014-05-06 Thread Ard Biesheuvel
On 6 May 2014 16:43, Catalin Marinas wrote: > On Thu, May 01, 2014 at 04:49:34PM +0100, Ard Biesheuvel wrote: >> diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c >> index 4aef42a04bdc..86ac6a9bc86a 100644 >> --- a/arch/arm64/kernel/fpsimd.c >> +++ b/arch/arm64/kernel/fpsimd.c >

Re: [PATCH resend 02/15] arm64: add abstractions for FPSIMD state manipulation

2014-05-06 Thread Catalin Marinas
On Thu, May 01, 2014 at 04:49:34PM +0100, Ard Biesheuvel wrote: > diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c > index 4aef42a04bdc..86ac6a9bc86a 100644 > --- a/arch/arm64/kernel/fpsimd.c > +++ b/arch/arm64/kernel/fpsimd.c > @@ -87,6 +87,39 @@ void fpsimd_flush_thread(void)

Re: [PATCH resend 01/15] asm-generic: allow generic unaligned access if the arch supports it

2014-05-06 Thread Ard Biesheuvel
On 6 May 2014 16:31, Catalin Marinas wrote: > On Thu, May 01, 2014 at 04:49:33PM +0100, Ard Biesheuvel wrote: >> Switch the default unaligned access method to 'hardware implemented' >> if HAVE_EFFICIENT_UNALIGNED_ACCESS is set. >> >> Signed-off-by: Ard Biesheuvel >> Acked-by: Arnd Bergmann >> --

Re: [PATCH resend 01/15] asm-generic: allow generic unaligned access if the arch supports it

2014-05-06 Thread Catalin Marinas
On Thu, May 01, 2014 at 04:49:33PM +0100, Ard Biesheuvel wrote: > Switch the default unaligned access method to 'hardware implemented' > if HAVE_EFFICIENT_UNALIGNED_ACCESS is set. > > Signed-off-by: Ard Biesheuvel > Acked-by: Arnd Bergmann > --- > include/asm-generic/unaligned.h | 21 ++

Re: [PATCH] crypto: x86/sha1: fix coverity CID 1195603

2014-05-06 Thread Milos Vyletel
And this time in plain text... Most likely yes but I wanted to keep sha1_ssse3_mod_init consistent with sha256_ssse3_mod_init/sha512_ssse3_mod_init functions. Milos On Tue, May 6, 2014 at 4:28 AM, Pavel Machek wrote: > On Wed 2014-04-30 15:17:54, Milos Vyletel wrote: >> Coverity detected possib

RE: [PATCH] crypto:caam - Modify width of few read only registers

2014-05-06 Thread Ruchika Gupta
> -Original Message- > From: Kim Phillips [mailto:kim.phill...@freescale.com] > Sent: Friday, May 02, 2014 2:15 AM > To: Gupta Ruchika-R66431 > Cc: linux-crypto@vger.kernel.org; herb...@gondor.apana.org.au > Subject: Re: [PATCH] crypto:caam - Modify width of few read only registers > > On

Re: [PATCH] crypto: x86/sha1: fix coverity CID 1195603

2014-05-06 Thread Pavel Machek
On Wed 2014-04-30 15:17:54, Milos Vyletel wrote: > Coverity detected possible use of uninitialized pointer when printing info > message during module load. While this is higly unlikely to cause any troubles > simple change in sha1_ssse3_mod_init to make it look like sha256/512 init > function will