[PATCH 1/2] crypto: sahara: Remove redundant of_match_ptr

2013-09-29 Thread Sachin Kamat
The data structure of_match_ptr() protects is always compiled in. Hence of_match_ptr() is not needed. Signed-off-by: Sachin Kamat Cc: Javier Martin --- drivers/crypto/sahara.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/crypto/sahara.c b/drivers/crypto/sahara.

[PATCH 2/2] crypto: mv_cesa: Remove redundant of_match_ptr

2013-09-29 Thread Sachin Kamat
The data structure of_match_ptr() protects is always compiled in. Hence of_match_ptr() is not needed. Signed-off-by: Sachin Kamat Cc: Sebastian Andrzej Siewior --- drivers/crypto/mv_cesa.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/crypto/mv_cesa.c b/drivers/

Re: [PATCH 3/3] ARM: mxs: dts: Enable DCP for MXS

2013-09-29 Thread Marek Vasut
Dear Lothar Waßmann, > Hi, > > Marek Vasut writes: > > Enable the DCP by default on both i.MX23 and i.MX28. > > > > Signed-off-by: Marek Vasut > > Cc: Herbert Xu > > Cc: David S. Miller > > Cc: Fabio Estevam > > Cc: Shawn Guo > > To: linux-crypto@vger.kernel.org > > --- > > > > arch/arm/b

Re: [PATCH 2/3] ARM: mxs: crypto: Add Freescale MXS DCP driver

2013-09-29 Thread Marek Vasut
Dear Fabio Estevam, [...] > > + * There can even be only one instance of the MXS DCP due to the > > + * design of Linux Crypto API. > > Is this true? Usually we don't want to create a global struct. Yeah, unfortunatelly :-( > > > + > > +/* AES 128 ECB and AES 128 CBC */ > > +static struct cry

Re: [PATCH 2/3] ARM: mxs: crypto: Add Freescale MXS DCP driver

2013-09-29 Thread Marek Vasut
Dear Lothar Waßmann, > Hi, > > Marek Vasut writes: > > Dear Lothar Waßmann, > > > > > Hi Marek, > > > > > > some small comments below. > > > > > > Marek Vasut writes: > > > > diff --git a/drivers/crypto/mxs-dcp.c b/drivers/crypto/mxs-dcp.c > > > > new file mode 100644 > > > > index 000..c2

Getting started with crypto drivers

2013-09-29 Thread Emilio López
Hello everyone, I would like to write a driver to support the "Security System" hardware block on some Allwinner ARM SoCs. The hardware supports AES, DES, 3DES, SHA-1, MD5 and has a PRNG. Data passing is done via two FIFOs. You can find some ugly userspace code to calculate a SHA1 hash here, s

Re: Asymmetric cryptography HW offloading

2013-09-29 Thread Nikos Mavrogiannopoulos
On 09/27/2013 12:58 PM, Horia Geantă wrote: > Thanks for the tip. > I took a look at BSD - AFAICT there is no SW implementation and crypto > engine drivers handle only the first two operations (MOD_EXP). > > My main concern now is the asymmetric ciphers API, that would eventually > allow implemen