Re: AES-NI for x86?

Am 26.10.2010 um 03:28 schrieb Huang Ying: > Hi, Mathias, > > On Tue, 2010-10-26 at 07:50 +0800, Herbert Xu wrote: >> Mathias Krause wrote: >>> Hello list, >>> >>> will there be a 32-bit version of the Intel AES-NI code? I've seen a 32-bit >>> version in openssl so it should be possible. Not? >>

Re: AES-NI for x86?

Hi, Mathias, On Tue, 2010-10-26 at 07:50 +0800, Herbert Xu wrote: > Mathias Krause wrote: > > Hello list, > > > > will there be a 32-bit version of the Intel AES-NI code? I've seen a 32-bit > > version in openssl so it should be possible. Not? > > It won't exist unless someone writes one. Are

Re: Question on structures

Mark Allyn wrote: > > Folks: > > Perhaps this is due to me being a neophyte . . . > > I notice that some of the structure have two different sets of functions. > > For example, the ahash_alg structure has .init and then .base.cra_init. > What is the difference between the two? cra_init initi

Re: General questions on crypto

Mark Allyn wrote: > > The sha1_generic that is supplied appears to be using shash, is there an > example for ahash? We have a number of existing drivers under drivers/crypto that use the ahash interface. You can use them as a model for your driver. Cheers, -- Email: Herbert Xu Home Page: ht

Re: Questions about ahash

Mark Allyn wrote: > > Herbert: > > Perhaps this is very fundamential, but what is the difference between > synchronous and asynchronous as far as crypto is concerned? My device > performs encryption and decryption asynchronously in relation to > the main processor in the system. The driver tells

Re: Questions about ahash

Herbert: Perhaps this is very fundamential, but what is the difference between synchronous and asynchronous as far as crypto is concerned? My device performs encryption and decryption asynchronously in relation to the main processor in the system. The driver tells the device to do x, then goes a

General questions on crypto

Folks: I am trying to understand how to implement an ahash instance for a hardware encryption device. I notice that the in-kernel documentation has no mention of ahash. Does anyone know where I can find a basic how-to document on putting together an ahash implementation in an existing driver

Re: AES-NI for x86?

Mathias Krause wrote: > Hello list, > > will there be a 32-bit version of the Intel AES-NI code? I've seen a 32-bit > version in openssl so it should be possible. Not? It won't exist unless someone writes one. Are you volunteering? :) Ccing the author in case there is some reason why it won't

Question on structures

Folks: Perhaps this is due to me being a neophyte . . . I notice that some of the structure have two different sets of functions. For example, the ahash_alg structure has .init and then .base.cra_init. What is the difference between the two? Thanks Truly, Mark Allyn Portland, Oregon www.a

Re: Questions about ahash

Allyn, Mark A wrote: > Folks: > > I am attempting to implement an ahash instance for a hardware crypto device. > > I see that there is a sha1 generic in the soruces a crypto/sha1_generic.c > which uses the shash interface. I was hoping to use that, but there is some > stuff in the headers that

Re: [PATCH] drivers/crypto: dubious error check

On Sun, Oct 24, 2010 at 09:39:49AM -0700, David Miller wrote: > From: Nicolas Kaiser > Date: Sun, 24 Oct 2010 15:05:56 +0200 > > > Looks like a copy-and-paste problem to me. > > > > Signed-off-by: Nicolas Kaiser > > Acked-by: David S. Miller Applied to crypto-2.6. Thanks! -- Email: Herbert

AES-NI for x86?

Hello list, will there be a 32-bit version of the Intel AES-NI code? I've seen a 32-bit version in openssl so it should be possible. Not? Regards, Mathias -- To unsubscribe from this list: send the line "unsubscribe linux-crypto" in the body of a message to majord...@vger.kernel.org More majordo