From: Shasi Pulijala
This patch adds further support for AMCC ppc4xx security device driver. This is
the
second release that adds algorithms like:
des/3des
rfc3686(ctr(aes))
gcm, ccm
hmac(md5,sha1,..,sha512)
xcbc(aes), arc4 and kasumi.
Signed-off-by: Shasi Pulijala
Acked-by: Loc Ho
---
From: Shasi Pulijala
This patch further adds immediate hash functions to md5/sha1/sha2 algs.
These immediate hash functions are used in hmac key generation in PPC Crypto4xx
driver.
Signed-off-by: Shasi Pulijala
Acked-by: Loc Ho
---
crypto/md5.c| 15 +++
crypto/sha1
Hi,
I am re-sending this patch as a patch series of 3, I am assuming the
earlier one did not go through the mailing lists
because it was over the size limit.
-Shasi
From: Shasi Pulijala
This is second release version for the PPC4XX Security driver that
adds aead type support and other
kernel_fpu_begin/end used preempt_disable/enable, so sleep should be
prevented between kernel_fpu_begin/end.
Signed-off-by: Huang Ying
---
arch/x86/crypto/fpu.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/arch/x86/crypto/fpu.c
+++ b/arch/x86/crypto/fpu.c
@@ -48,7 +48,7 @
Because AES-NI instructions will touch XMM state, corresponding code
must be enclosed within kernel_fpu_begin/end, which used
preempt_disable/enable. So sleep should be prevented between
kernel_fpu_begin/end.
Signed-off-by: Huang Ying
---
arch/x86/crypto/aesni-intel_glue.c |4
1 file c
Original implementation of aesni_cbc_dec do not save IV if input
length % 4 == 0. This will make decryption of next block failed.
Signed-off-by: Huang Ying
---
arch/x86/crypto/aesni-intel_asm.S |5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
--- a/arch/x86/crypto/aesni-intel_asm.
