Successfully identified regression in *linux* in CI configuration
tcwg_kernel/gnu-master-arm-mainline-allmodconfig. So far, this commit has
regressed CI configurations:
- tcwg_kernel/gnu-master-arm-mainline-allmodconfig
Culprit:
commit 3fe617ccafd6f5bb33c2391d6f4eeb41c1fd0151
Author: Linus To
Hi Linus,
As expected, kernel builds started failing in less-common configurations. In
this particular case the culprit is amdgpu driver when built for 32-bit ARM in
allmodconfig configuration using tip-of-trunk GCC.
Hi Alex, [picking your name from “git log drivers/gpu/drm/amd/amdgpu/amdgpu.h
Successfully identified regression in *llvm* in CI configuration
tcwg_bmk_llvm_apm/llvm-master-aarch64-spec2k6-Oz_LTO. So far, this commit has
regressed CI configurations:
- tcwg_bmk_llvm_apm/llvm-master-aarch64-spec2k6-Oz_LTO
Culprit:
commit 131b4620ee7847102479f399ce3e35a3c1cb5461
Author: C
Successfully identified regression in *llvm* in CI configuration
tcwg_bmk_llvm_tx1/llvm-release-aarch64-spec2k6-O3. So far, this commit has
regressed CI configurations:
- tcwg_bmk_llvm_tx1/llvm-release-aarch64-spec2k6-O3
Culprit:
commit 34f839fc9d4c0638e09c81e9981d4dacf69c3ed6
Author: Zahira
Successfully identified regression in *linux* in CI configuration
tcwg_kernel/gnu-release-arm-next-allmodconfig. So far, this commit has
regressed CI configurations:
- tcwg_kernel/gnu-release-arm-next-allmodconfig
Culprit:
commit 4d3b252a0a3aed2f6fc70aec3c37275a9ca179a4
Merge: 907f2745370d 6f
I think this is a false positive.
It is doing:
#define shift 2
#define mask (1ul<<(shift))
#define REG_FIELD_MASK(a,b) (mask)
#define REG_FIELD_SHIFT(a,b) (shift)
#define REG_SET_FIELD(orig_val, reg, field, field_val) \
(((orig_val) & ~REG_FIELD_MASK(reg, field)) |
Successfully identified regression in *binutils* in CI configuration
tcwg_bmk_llvm_apm/llvm-master-arm-spec2k6-Oz. So far, this commit has
regressed CI configurations:
- tcwg_bmk_llvm_apm/llvm-master-arm-spec2k6-Oz
Culprit:
commit f947f96797f8ec33aabf9cd7234c850778068445
Author: Tom de Vries
Ok, I am now able to reproduce it with:
#define shiftCB_DISABLE_FAULT_ON_UNMAPPED_ACCESS1 0
#define maskCB_DISABLE_FAULT_ON_UNMAPPED_ACCESS1 1L
#define REG_FIELD_MASK(a,b) (mask##b)
#define REG_FIELD_SHIFT(a,b) (shift##b)
#define REG_SET_FIELD(orig_val, reg, field, field_val) \
Filed as https://gcc.gnu.org/PR102245 .
From: linaro-toolchain on behalf of
Andrew Pinski
Sent: Wednesday, September 8, 2021 2:31 PM
To: Maxim Kuvyrkov; Linus Torvalds; Alex Deucher
Cc: linaro-toolchain
Subject: Re: [EXT] Re: [CI-NOTIFY]: TCWG Bisect
tc
Oh it is only on the trunk of GCC so to some extend it caught a regression in
GCC :).
From: linaro-toolchain on behalf of
Andrew Pinski
Sent: Wednesday, September 8, 2021 2:36 PM
To: Maxim Kuvyrkov; Linus Torvalds; Alex Deucher
Cc: linaro-toolchain
Subj
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