[ACTIVITY] 24 - 28 February 2020

== Progress == * More Morello (updating for new capability encoding) == Plan == * More Morello * Tiny bit GlobalISel ___ linaro-toolchain mailing list linaro-toolchain@lists.linaro.org https://lists.linaro.org/mailman/listinfo/linaro-toolchain

Re: gdb: instructions and functions recording on ARM processors using CoreSight ETM

Hi Zied, Luis here. I work on GDB for ARM architectures. On 2/14/20 1:53 PM, Zied Guermazi wrote: Good afternoon, I would like to announce the breakthrough in extending gdb with non intrusive instructions and functions tracing on ARM processors using Coresight ETM traces, as described in previo

[ACTIVITY] 24-28 February 2020

== Progress == * BFD Linker: - GNU-629: non-contiguous memory support: posted updated v5 * GCC: * GCC-9: continued work for validation of -mpure-code on v6m. Fix committed to trunk and backported to gcc-9 * GCC upstream validation: - reported a couple of failures/regressions - working on reproduc

[ACTIVITY] report week ending 28 Feb

Progress: * VIRT-65 [QEMU upstream maintainership] - Got confused by QEMU aborting in the PMU code on a GICv3-only host, which turns out to be because our error handling for "no GICv2 support" was broken. Sent a patch. - Another push towards getting texi-to-rST conversion done: + C

[ACTIVITY] week ending Mar. 1 2020

VirtIO Related Work ([VIRT-366]) - had a couple of HOs and internal threads to flesh out understanding for VirtIO work - queried VIRTIO adoption in other hypervisors Message-Id: <87mu93vwy2@linaro.org> to help understanding - need a meeting with Q

Re: gdb: instructions and functions recording on ARM processors using CoreSight ETM

hi Luisfor sure, I would like to pursue it upstream, and I will need your support here, as well as for completing the remote protocol extensions. Thanks for your proposal for support.A good introduction to this implementation can be found here  https://www.mail-archive.com/linaro-toolchain@list