* TSAN support for Aarch64 (5/10)
Working on memory map layout for TSAN in Aarch64 (TCWG-581) .
* Emails, meetings. (3/10)
* 1-1 with maxim, linaro status call.
* internal AMD meetings, 1-1 with AMD manager.
* GCC mailing list.
Leave on 26-Jan-2014 (India Holiday) (2/10)
Planned
== Progress ==
* TCWG-554 (2/10)
- Looking at subsequent optimisation passes
* public holiday (2/10)
* Leave (4/10)
* Misc (2/10)
- Connect preparation
- Bugs/gcc-patches list
- Looked at IRA
== Plan ==
* Connect preparation
* TCWG-554
___
linaro-t
== Progress ==
* LLD (1/10, TCWG-561, TCWG-563, TCWG-570)
- Updated and added more cards, adding more detail and loose priorities
- Rebased, fixed up and resubmitted relocation test patch
* AArch64 ILP32 toolchain (4/10)
- Attempted various SPEC2k runs and fixed issues found
* Submitted patch f
== Progress ==
* GCC trunk/4.9 monitoring (1/10)
* AArch64 sanitizers (2/10)
- posted patches to enable ASan in LLVM/AArch64
still hardcoded to 39 VA bits
- testsuite clean (after disabling a longjmp test, as for AArch32)
* Neon intrinsics tests (1/10)
- series committed, except for the